ST62T00CB6 STMicroelectronics, ST62T00CB6 Datasheet - Page 41

• Manufacturer Part Number: ST62T00CB6
• Description: IC MCU 8BIT OTP 1K 16-PDIP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T00CB6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, WDT
• Number Of I /o: 9
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Controller Family/series: ST6
• No. Of I/o's: 9
• Ram Memory Size: 64Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ST62T0x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 9
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Cpu Family: ST6
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 64Byte
• # I/os (max): 9
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 16
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2093-5

8 ON-CHIP PERIPHERALS
8.1 WATCHDOG TIMER (WDG)
8.1.1 Introduction
The Watchdog timer is used to detect the occur-
rence of a software fault, usually generated by ex-
ternal interference or by unforeseen logical condi-
tions, which causes the application program to
abandon its normal sequence. The Watchdog cir-
cuit generates an MCU reset on expiry of a pro-
grammed time period, unless the program refresh-
es the counter’s contents before the SR bit be-
comes cleared.
Figure 25. Watchdog Block Diagram
f
int /12
bit 7
T0
WATCHDOG REGISTER (WDGR)
T1
7-BIT DOWNCOUNTER
T2
Doc ID 4563 Rev 5
CLOCK DIVIDER
T3
256
T4
8.1.2 Main Features
■
■
■
■
Programmable timer (64 steps of 3072 clock
cycles)
Software reset
Reset (if watchdog activated) when the SR bit
reaches zero
Hardware or software watchdog activation
selectable by option bit (Refer to the option
bytes section)
T5
SR
RESET
bit 0
ST6200C ST6201C ST6203C
C
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