ST62T00CB6 STMicroelectronics, ST62T00CB6 Datasheet - Page 55

• Manufacturer Part Number: ST62T00CB6
• Description: IC MCU 8BIT OTP 1K 16-PDIP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T00CB6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, WDT
• Number Of I /o: 9
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Controller Family/series: ST6
• No. Of I/o's: 9
• Ram Memory Size: 64Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ST62T0x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 9
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Cpu Family: ST6
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 64Byte
• # I/os (max): 9
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 16
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2093-5

INSTRUCTION SET (Cont’d)
Conditional Branch. Branch instructions perform
a branch in the program when the selected condi-
tion is met.
Bit Manipulation Instructions. These instruc-
tions can handle any bit in Data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Table 17. Conditional Branch Instructions
Notes
b
e
ee
Table 18. Bit Manipulation Instructions
Notes:
b
rr
Bit Manipulation Instructions should not be used on Port Data Registers and any registers with read only and/or write only bits (see I/O port
chapter)
Table 19. Control Instructions
Notes:
1.
Table 20. Jump & Call Instructions
Notes:
abc 12-bit address
*
JRC e
JRNC e
JRZ e
JRNZ e
JRR b, rr, ee
JRS b, rr, ee
SET b,rr
RES b,rr
NOP
RET
RETI
STOP
WAIT
CALL abc
JP abc
3-bit address
5 bit signed displacement in the range -15 to +16
8 bit signed displacement in the range -126 to +129
3-bit address
Data space register
This instruction is deactivated and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.
Affected
Not Affected
Instruction
Instruction
Instruction
Instruction
:
(1)
Extended
Extended
C = 1
C = 0
Z = 1
Z = 0
Bit = 0
Bit = 1
Bit Direct
Bit Direct
Inherent
Inherent
Inherent
Inherent
Inherent
Addressing Mode
Addressing Mode
Addressing Mode
Branch If
Doc ID 4563 Rev 5
Bytes
Bytes
Bytes
Bytes
2
2
1
1
1
1
3
3
2
2
1
1
1
1
1
rr
*
Control Instructions. Control instructions control
microcontroller operations during program execu-
tion.
Jump and Call. These two instructions are used
to perform long (12-bit) jumps or subroutine calls
to any location in the whole program space.
*
*Not Affected
Affected. The tested bit is shifted into carry.
Not Affected
Data space register
Cycles
Cycles
Cycles
Cycles
Not Affected
4
4
2
2
2
2
5
5
4
4
2
2
2
2
2
ST6200C ST6201C ST6203C
Z
Z
Z
Z
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Flags
Flags
Flags
Flags
C
C
C
C
*
*
*
*
*
*
*
*
*
*
*
*
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