ST62T00CB6 STMicroelectronics, ST62T00CB6 Datasheet - Page 51

IC MCU 8BIT OTP 1K 16-PDIP

ST62T00CB6

Manufacturer Part Number
ST62T00CB6
Description
IC MCU 8BIT OTP 1K 16-PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheets

Specifications of ST62T00CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
9
Program Memory Size
1KB (1K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
9
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T0x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
9
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Cpu Family
ST6
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
64Byte
# I/os (max)
9
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
16
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2093-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST62T00CB6
Manufacturer:
MICRON
Quantity:
1 450
Part Number:
ST62T00CB6
Manufacturer:
STMicroelectronics
Quantity:
135
A/D CONVERTER (Cont’d)
8.3.5 Low Power Modes
Note: The A/D converter may be disabled by clear-
ing the PDS bit. This feature allows reduced power
consumption when no conversion is needed.
8.3.6 Interrupts
Note: The EOC bit is cleared only when a new
conversion is started (it cannot be cleared by writ-
ing 0). To avoid generating further EOC interrupt,
the EAI bit has to be cleared within the ADC inter-
rupt subroutine.
8.3.7 Register Description
A/D CONVERTER CONTROL REGISTER (AD-
CR)
Address: 0D1h - Read/Write (Bit 6 Read Only, Bit
5 Write Only)
Reset value: 0100 0000 (40h)
Bit 7 = EAI Enable A/D Interrupt.
0: ADC interrupt disabled
1: ADC interrupt enabled
Bit 6 = EOC End of conversion. Read Only
When a conversion has been completed, this bit is
set by hardware and an interrupt request is gener-
ated if the EAI bit is set. The EOC bit is automati-
Table 14. ADC Register Map and Reset Values
Interrupt Event
WAIT
STOP
End of Conver-
sion
EAI
Address
Mode
7
(Hex.)
0D0h
0D1h
EOC
No effect on A/D Converter. ADC interrupts
cause the device to exit from Wait mode.
A/D Converter disabled.
ADR
Reset Value
ADCR
Reset Value
STA
Register
Label
Event
Flag
EOC
PDS
Description
Enable
ADCR
ADR7
EAI
Bit
3
EAI
7
0
0
OSC
OFF
from
Wait
Exit
Yes
ADR6
EOC
ADCR
6
0
1
1
Doc ID 4563 Rev 5
from
Stop
Exit
No
ADCR
0
0
ADR5
STA
5
0
0
cally cleared when the STA bit is set. Data in the
data conversion register are valid only when this
bit is set to “1”.
0: Conversion is not complete
1: Conversion can be read from the ADR register
Bit 5 = STA: Start of Conversion. Write Only.
0: No effect
1: Start conversion
Note: Setting this bit automatically clears the EOC
bit. If the bit is set again when a conversion is in
progress, the present conversion is stopped and a
new one will take place. This bit is write only, any
attempt to read it will show a logical zero.
Bit 4 = PDS Power Down Selection.
0: A/D converter is switched off
1: A/D converter is switched on
Bit 3 = ADCR3 Reserved, must be cleared.
Bit 2 = OSCOFF Main Oscillator off.
0: Main Oscillator enabled
1: Main Oscillator disabled
Note: This bit does not apply to the ADC peripher-
al but to the main clock system. Refer to the Clock
System section.
Bits 1:0 = ADCR[1:0] Reserved, must be cleared.
A/D CONVERTER DATA REGISTER (ADR)
Address: 0D0h - Read only
Reset value: xxxx xxxx (xxh)
Bits 7:0 = ADR[7:0]: 8 Bit A/D Conversion Result.
ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0
ADR4
7
PDS
4
0
0
ADCR3
ADR3
3
0
0
ST6200C ST6201C ST6203C
OSCOFF
ADR2
2
0
0
ADCR1
ADR1
1
0
0
ADCR0
ADR0
51/100
0
0
0
0
1

Related parts for ST62T00CB6