MC908JB16JDWE Freescale Semiconductor, MC908JB16JDWE Datasheet - Page 238

IC MCU 16K FLASH 6MHZ USB 20SOIC

MC908JB16JDWE

Manufacturer Part Number
MC908JB16JDWE
Description
IC MCU 16K FLASH 6MHZ USB 20SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908JB16JDWE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
SCI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SCI/SPI/USB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Serial Communications Interface
12.9.4 SCI Status Register 1
Technical Data
238
Address:
SCI status register 1 (SCS1) contains flags to signal these conditions:
SCTE — SCI Transmitter Empty Bit
Reset:
Read:
Write:
This clearable, read-only bit is set when the SCDR transfers a
character to the transmit shift register. SCTE can generate an SCI
transmitter CPU interrupt request. When the SCTIE bit in SCC2 is set,
SCTE generates an SCI transmitter CPU interrupt request. In normal
operation, clear the SCTE bit by reading SCS1 with SCTE set and
then writing to SCDR. Reset sets the SCTE bit.
Serial Communications Interface Module (SCI)
1 = SCDR data transferred to transmit shift register
0 = SCDR data not transferred to transmit shift register
Transfer of SCDR data to transmit shift register complete
Transmission complete
Transfer of receive shift register data to SCDR complete
Receiver input idle
Receiver overrun
Noisy data
Framing error
Parity error
$005D
SCTE
Bit 7
1
Figure 12-12. SCI Status Register 1 (SCS1)
= Unimplemented
TC
6
1
SCRF
5
0
IDLE
4
0
OR
3
0
MC68HC908JB16
NF
Freescale Semiconductor
2
0
FE
1
0
Rev. 1.1
Bit 0
PE
0

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