ST7FLITEU05M3TR STMicroelectronics, ST7FLITEU05M3TR Datasheet - Page 119

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ST7FLITEU05M3TR

Manufacturer Part Number
ST7FLITEU05M3TR
Description
IC MCU 8BIT 2K FLASH 8SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITEU05M3TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FUS-PRIMER, ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
ST7LITEU05 ST7LITEU09
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than the maximum
4. The stabilization time of the A/D converter is masked by the first t
value). Data guaranteed by Design, not tested in production.
valid.
Figure 68. Typical application with ADC
Table 70.
1. Data based on characterization results over the whole temperature range.
Table 71.
1. Data based on characterization results over the whole temperature range.
Symbol
Symbol
|E
|E
|E
|E
|E
|E
|E
|E
(1)
|E
|E
(1)
O
G
D
T
L
O
G
D
T
L
|
|
|
|
|
|
|
|
|
|
Total unadjusted error
Offset error
Gain error
Differential linearity error
Integral linearity error
V
AIN
Total unadjusted error
Offset error
Gain error
Differential linearity error
Integral linearity error
ADC accuracy with V
ADC accuracy with V
R
Parameter
AIN
Parameter
AINx
DD
DD
f
f
CPU
ADC
= 3.3 V to 5.5 V
= 2.7 V to 3.3 V
f
f
V
CPU
ADC
= 4 MHz,
= 2 MHz
LOAD
Conditions
DD
V
0.6 V
V
0.6 V
T
T
= 8 MHz,
=4 MHz
. The first conversion after the enable is then always
Conditions
(1)
(1)
I
±1 A
L
Typ
1.9
0.9
0.8
1.4
1.1
10-bit A/D
conversion
Electrical characteristics
Typ
2.0
0.9
1.0
1.2
1.1
Max
3.0
1.5
1.4
2.5
2.5
ST7LITEU0x
Max
2.5
5.0
1.5
3.5
4.5
C
Unit
LSB
ADC
119/139
Unit
LSB

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