Z8F4823FT020SG Zilog, Z8F4823FT020SG Datasheet - Page 59

• Manufacturer Part Number: Z8F4823FT020SG
• Description: IC ENCORE MCU FLASH 48K 80QFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F4823FT020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z8F482x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4275; Z8F4823FT020SG

Reset and Stop Mode Recovery
Reset Types
Table 8. Reset and Stop Mode Recovery Characteristics and Latency
PS019921-0308
Reset Type
System reset
Stop Mode
Recovery
The Reset Controller within the Z8 Encore! XP F64XX Series controls Reset and Stop
Mode Recovery operation. In typical operation, the following events cause a Reset to
occur:
•
•
•
•
•
When the Z8 Encore! XP F64XX Series devices are in STOP mode, a Stop Mode Recov-
ery is initiated by either of the following:
•
•
•
The Z8 Encore! XP F64XX Series provides two different types of reset operation (system
reset and Stop Mode Recovery). The type of Reset is a function of both the current operat-
ing mode of the Z8 Encore! XP F64XX Series devices and the source of the Reset.
lists the types of Reset and their operating characteristics.
Reset Characteristics and Latency
Control Registers
Reset (as applicable) Reset
Unaffected, except
WDT_CTL register
Power-On Reset
Voltage Brownout
Watchdog Timer time-out (when configured via the WDT_RES Option Bit to initiate
a Reset)
External RESET pin assertion
On-Chip Debugger initiated Reset (OCDCTL[0] set to 1)
Watchdog Timer time-out
GPIO Port input pin transition on an enabled Stop Mode Recovery source
DBG pin driven Low
eZ8
Reset
™
CPU Reset Latency (Delay)
66 WDT Oscillator cycles + 16 System Clock cycles
66 WDT Oscillator cycles + 16 System Clock cycles
Z8 Encore! XP
Reset and Stop Mode Recovery
Product Specification
®
F64XX Series
Table 8
45