Z8F4823FT020SG Zilog, Z8F4823FT020SG Datasheet - Page 76

IC ENCORE MCU FLASH 48K 80QFP

Z8F4823FT020SG

Manufacturer Part Number
Z8F4823FT020SG
Description
IC ENCORE MCU FLASH 48K 80QFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F4823FT020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
80-BQFP
Processor Series
Z8F482x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
60
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4275
Z8F4823FT020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F4823FT020SG
Manufacturer:
Zilog
Quantity:
10 000
Table 21. Port A–H Input Data Registers (PxIN)
Table 22. Port A
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Port A–H Input Data Registers
Port A–H Output Data Register
POUT7
PIN7
7
7
Reading from the Port A–H Input Data registers
from the corresponding port pins. The Port A–H Input Data registers are Read-only.
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
The Port A–H Output Data register
POUT[7:0]—Port Output Data
These bits contain the data to be driven out from the port pins. The values are only driven
if the corresponding pin is configured as an output and the pin is not configured for alter-
nate function operation.
0 = Drive a logical 0 (Low).
1= Drive a logical 1 (High). High value is not driven if the drain has been disabled by
H Output Data Register (PxOUT)
setting the corresponding Port Output Control register bit to 1.
POUT6
PIN6
6
6
FD2H, FD6H, FDAH, FDEH, FE2H, FE6H, FEAH, FEEH
FD3H, FD7H, FDBH, FDFH, FE3H, FE7H, FEBH, FEFH
POUT5
PIN5
5
5
POUT4
PIN4
4
4
(Table
R/W
R
X
0
22) writes output data to the pins.
POUT3
PIN3
3
3
(Table
Z8 Encore! XP
21) returns the sampled values
POUT2
PIN2
2
2
Product Specification
POUT1
PIN1
General-Purpose I/O
1
1
®
F64XX Series
POUT0
PIN0
0
0
62

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