ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 150

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F280
Table 37 : Stack Size Selection
BUSCON0 (FF0Ch / 86h)
BUSCON1 (FF14h / 8Ah)
BUSCON2 (FF16h / 8Bh)
BUSCON3 (FF18h / 8Ch)
150/186
BYTDIS
ROMEN
SGTDIS
ROMS1
STKSZ
CSWEN0 CSREN0 RDYPOL0 RDYEN0
CSWEN1 CSREN1 RDYPOL1 RDYEN1
CSWEN2 CSREN2 RDYPOL2 RDYEN2
CSWEN3 CSREN3 RDYPOL3 RDYEN3
<STKSZ>
RW
RW
RW
RW
15
15
15
15
0 0 0 b
0 0 1 b
0 1 0 b
0 1 1 b
1 0 0 b
1 0 1 b
1 1 0 b
1 1 1 b
RW
RW
RW
RW
14
14
14
14
Stack Size
(Words)
Disable/Enable Control for Pin BHE (Set according to data bus width)
‘0’: Pin BHE enabled
‘1’: Pin BHE disabled, pin may be used for general purpose I/O.
Internal Memory Enable (Set according to pin EA during reset)
‘0’: Internal Memory disabled: accesses to the Memory area use the external bus
‘1’: Internal Memory enabled.
Segmentation Disable/Enable Control
‘0’: Segmentation enabled (CSP is saved/restored during interrupt entry/exit)
‘1’: Segmentation disabled (Only IP is saved/restored).
Internal Flash Memory Mapping
‘0’: Internal Flash Memory area mapped to segment 0 (00’0000H...00’7FFFH)
‘1’: Internal Flash Memory area mapped to segment 1 (01’0000H...01’7FFFH).
System Stack Size
Selects the size of the system stack (in the internal RAM) from 32 to 1024 words.
1024
256
128
512
64
32
-
-
RW
RW
RW
RW
13
13
13
13
00’FBFEh...00’FA00h (Default after Reset)
00’FBFEh...00’FB00h
00’FBFEh...00’FB80h
00’FBFEh...00’FBC0h
00’FBFEh...00’F800h (not for 1K Byte IRAM)
Reserved. Do not use this combination
Reserved. Do not use this combination
00’FDFEh...00’FX00h (Note: No circular stack)
00’FX00h represents the lower IRAM limit, i.e.
1K Byte: 00’FA00h, 2K Byte: 00’F600h, 3K Byte: 00’F200h
RW
RW
RW
RW
12
12
12
12
Internal RAM Addresses (Words) of Physical Stack
11
11
11
11
-
-
-
-
BUS ACT0 ALE CTL0
BUSACT1
BUSACT2
BUSACT3
RW
RW
RW
RW
10
10
10
10
2
SFR
SFR
SFR
SFR
ALECTL1
ALECTL2
ALECTL3
RW
RW
RW
RW
9
9
9
9
2
8
8
8
8
-
-
-
-
7
7
7
7
BTYP
BTYP
BTYP
BTYP
RW
RW
RW
RW
1
6
6
6
6
MTTC0 RWDC0
MTTC1 RWDC1
MTTC2 RWDC2
MTTC3 RWDC3
RW
RW
RW
RW
5
5
5
5
RW
RW
RW
RW
4
4
4
4
Reset Value: 0000h
Reset Value: 0000h
Reset Value: 0000h
Reset Value: 0xx0h
Significant Bits of
Stack Pointer SP
SP.11...SP.0
3
SP.8...SP.0
SP.7...SP.0
SP.6...SP.0
SP.5...SP.0
SP.9...SP.0
3
3
3
MCTC
MCTC
MCTC
MCTC
2
2
2
2
-
-
RW
RW
RW
RW
1
1
1
1
0
0
0
0