ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 78

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F280
When an external bus mode is enabled, the direc-
tion of the port pin and the loading of data into the
port output latch are controlled by the bus control-
ler hardware.
The input of the port output latch is disconnected
from the internal bus and is switched to the line
labeled “Alternate Data Output” via a multiplexer.
The alternate data can be the 16-bit intra-segment
address or the 8/16-bit data information. The
Figure 30 : Block Diagram of a PORT0 Pin
78/186
Write P0H.y / P0L.y
Write DP0H.y / DP0L.y
Read DP0H.y / DP0L.y
Read P0H.y / P0L.y
Port Output
Direction
Latch
Latch
MUX
Alternate
Direction
Port Data
Output
1
0
Alternate
Function
Enable
Alternate
Data
Output
1
0
1
0
incoming data on PORT0 is read on the line
“Alternate Data Input”. While an external bus
mode is enabled, the user software should not
write to the port output latch, otherwise unpredict-
able results may occur. When the external bus
modes are disabled, the contents of the direction
register last written by the user becomes active.
The Figure 30 shows the structure of a PORT0
pin.
MUX
MUX
CPU Clock
Latch
Input
Output
Buffer
y = 7...0
P0H.y
P0L.y