MC908QL4MDTER Freescale Semiconductor, MC908QL4MDTER Datasheet - Page 184

• Manufacturer Part Number: MC908QL4MDTER
• Description: IC MCU 8BIT 4K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QL4MDTER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timer Interface Module (TIM)
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
TOVx — Toggle-On-Overflow Bit
184
MSxB
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation. See
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin (see
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin.
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the counter overflows. When channel x is an input capture channel, TOVx has no effect.
X
X
0
0
0
0
0
0
0
1
1
1
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
MSxA
X
X
X
0
1
0
0
0
1
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
After initially enabling a TIM channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
When TOVx is set, a counter overflow takes precedence over a channel x
output compare if both occur at the same time.
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
Table 15-2. Mode, Edge, and Level Selection
ELSxA
Table
0
0
1
0
1
0
1
0
1
1
0
1
MC68HC908QL4 Data Sheet, Rev. 8
15-2.
Output compare
Table 15-2
Buffered output
buffered PWM
Output preset
Input capture
compare or
or PWM
Mode
NOTE
NOTE
NOTE
shows how ELSxB and ELSxA work.
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Configuration
Freescale Semiconductor
Table
15-2).