MC908QL4MDTER Freescale Semiconductor, MC908QL4MDTER Datasheet - Page 93

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MC908QL4MDTER

Manufacturer Part Number
MC908QL4MDTER
Description
IC MCU 8BIT 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QL4MDTER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
9.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
9.5.1 Wait Mode
The KBI module remains active in wait mode. Clearing IMASKK in KBSCR enables keyboard interrupt
requests to bring the MCU out of wait mode.
9.5.2 Stop Mode
The KBI module remains active in stop mode. Clearing IMASKK in KBSCR enables keyboard interrupt
requests to bring the MCU out of stop mode.
9.6 KBI During Break Interrupts
The system integration module (SIM) controls whether status bits in other modules can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state. See BFCR in the SIM section of this data sheet.
To allow software to clear status bits during a break interrupt, write a 1 to BCFE. If a status bit is cleared
during the break state, it remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a 0 to BCFE. With BCFE cleared (its default state),
software can read and write registers during the break state without affecting status bits. Some status bits
have a two-step read/write clearing procedure. If software does the first step on such a bit before the
break, the bit cannot change during the break state as long as BCFE is cleared. After the break, doing the
second step clears the status bit.
9.7 I/O Signals
The KBI module can share its pins with the general-purpose I/O pins. See
are shared.
9.7.1 KBI Input Pins (KBI5:KBI0)
Each KBI pin is independently programmable as an external interrupt source. KBI pin polarity can be
controlled independently. Each KBI pin when enabled can be configured to use an internal pullup/pulldown
device using the corresponding PTAPUEx bit see
selection of pullup or pulldown is automatically configured to match the polarity selected in KBIPR.
9.8 Registers
The following registers control and monitor operation of the KBI module:
Freescale Semiconductor
KBSCR (keyboard interrupt status and control register)
KBIER (keyboard interrupt enable register)
KBIPR (keyboard interrupt polarity register)
MC68HC908QL4 Data Sheet, Rev. 8
12.3.3 Port A Input Pullup/Down Enable
Figure 9-1
for the port pins that
Low-Power Modes
Register. The
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