MC908QL4MDTER Freescale Semiconductor, MC908QL4MDTER Datasheet - Page 196

• Manufacturer Part Number: MC908QL4MDTER
• Description: IC MCU 8BIT 4K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QL4MDTER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Development Support
.
16.3.1.1 Normal Monitor Mode
RST and OSC1 functions will be active on the PTA3 and PTA5 pins respectively as long as V
applied to the IRQ pin. If the IRQ pin is lowered (no longer V
monitor mode, but the pin functions will be determined by the settings in the configuration registers (see
Chapter 5 Configuration Register
BIL instructions will read the IRQ pin state only if IRQEN is set in the CONFIG2 register.
If monitor mode was entered with V
196
Function
[Pin No.]
MON08
Monitor
Monitor
Normal
Forced
Mode
1. PTA0 must have a pullup resistor to V
2. Communication speed in the table is an example to obtain a baud rate of 9600. Baud rate using external oscillator is bus
3. External clock is a 9.8304 MHz oscillator on OSC1.
4. X = don’t care
5. MON08 pin refers to P&E Microcomputer Systems’ MON08-Cyclone 2 by 8-pin connector.
User
frequency / 256 and baud rate using internal oscillator is bus frequency / 333.
(PTA2)
V
V
IRQ
V
V
[6]
TST
TST
X
DD
SS
(PTA3)
Table 16-1. Monitor Mode Signal Requirements and Options
RST
RST
V
[4]
X
X
X
DD
Vector
$FFFF
(blank)
$FFFF
(blank)
$FFFF
Reset
Not
—
X
Communi-
(CONFIG)) when V
TST on
cation
DD
Serial
PTA0
COM
MC68HC908QL4 Data Sheet, Rev. 8
[8]
X
1
1
1
OSC1
in monitor mode.
V
NC
NC
NC
NC
NC
NC
DD
IRQ, then the COP is disabled as long as V
MOD0
PTA1 PTA4
[12]
11
13
15
Selection
1
X
X
X
1
3
5
7
9
Mode
MOD1
[10]
10
12
14
16
X
X
X
0
2
4
6
8
TST
Disabled
Disabled
Disabled
Enabled
GND
RST
IRQ
PTA0
PTA4
PTA1
NC
NC
was lowered. With V
COP
—
TST
) then the chip will still be operating in
External
9.8304
9.8304
Clock
OSC1
MHz
MHz
[13]
X
X
Communication
Frequency
Speed
(Trimmed)
3.2 MHz
2.4576
2.4576
MHz
MHz
Bus
—
X
TST
lowered, the BIH and
Freescale Semiconductor
TST
Baud
9600
9600
9600
Rate
—
X
is applied to IRQ
Provide external
clock at OSC1.
Provide external
clock at OSC1.
Internal clock is
active.
Comments
TST
is
.