S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 474

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer Module (TIM16B8CV2)
To operate the 16-bit pulse accumulator independently of input capture or output compare 7 and 0
respectively the user must set the corresponding bits IOSx = 1, OMx = 0 and OLx = 0. OC7M7 in the
OC7M register must also be cleared.
To enable output action using the OM7 and OL7 bits on the timer port,the corresponding bit OC7M7 in
the OC7M register must also be cleared. The settings for these bits can be seen in
Note: in
IOSx is the register TIOS bit x,
OC7Mx is the register OC7M bit x,
TCx is timer Input Capture/Output Compare register,
IOCx is channel x,
OMx/OLx is the register TCTL1/TCTL2,
OC7Dx is the register OC7D bit x.
IOCx = OC7Dx+ OMx/OLx, means that both OC7 event and OCx event will change channel x value.
16.3.2.9
474
Module Base + 0x000A
Module Base + 0x000B
IOCx=OC7Dx
IOC7=OM7/O
TC7=TCx
Reset
Reset
L7
W
W
R
R
Table
OC7Mx=1
EDG7B
EDG3B
Timer Control Register 3/Timer Control Register 4 (TCTL3 and TCTL4)
0
0
IOCx=OC7Dx
IOC7=OM7/O
7
7
16-10, the IOS7 and IOSx should be set to 1
+OMx/OLx
TC7>TCx
L7
OC7M7=0
EDG7A
EDG3A
0
0
6
6
TC7=TCx
Figure 16-16. Timer Control Register 3 (TCTL3)
Figure 16-17. Timer Control Register 4 (TCTL4)
Table 16-10. The OC7 and OCx event priority
IOC7=OM7/OL7
IOCx=OMx/OLx
S12XS Family Reference Manual, Rev. 1.11
OC7Mx=0
EDG6B
EDG2B
0
0
5
5
TC7>TCx
EDG6A
EDG2A
0
0
4
4
IOC7=OC7D7
IOCx=OC7Dx
TC7=TCx
EDG5B
EDG1B
OC7Mx=1
0
0
3
3
IOC7=OC7D7
IOCx=OC7Dx
+OMx/OLx
TC7>TCx
EDG5A
EDG1A
OC7M7=1
0
0
2
2
TC7=TCx
Table 16-10
EDG4B
EDG0B
Freescale Semiconductor
IOCx=OMx/OLx
IOC7=OC7D7
0
0
1
1
OC7Mx=0
TC7>TCx
EDG4A
EDG0A
0
0
0
0