S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 575

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
FPHS[1:0]
FPLS[1:0]
FPOPEN
FPHDIS
FPLDIS
RNV[6]
Field
4–3
1–0
7
6
5
2
Flash Protection Operation Enable — The FPOPEN bit determines the protection function for program or
erase operations as shown in
0 When FPOPEN is clear, the FPHDIS and FPLDIS bits define unprotected address ranges as specified by the
1 When FPOPEN is set, the FPHDIS and FPLDIS bits enable protection for the address range specified by the
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x7F_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area
in P-Flash memory as shown
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address
0x7F_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected/unprotected area
in P-Flash memory as shown in
corresponding FPHS and FPLS bits
corresponding FPHS and FPLS bits
1
FPOPEN
For range sizes, refer to
FPHS[1:0]
1
1
1
1
0
0
0
0
Table 19-19. P-Flash Protection Higher Address Range
00
01
10
11
FPHDIS
Table 19-18. P-Flash Protection Function
Table 19-17. FPROT Field Descriptions
S12XS Family Reference Manual, Rev. 1.11
1
1
0
0
1
1
0
0
inTable
Table 19-18
Table
0x7F_E000–0x7F_FFFF
0x7F_C000–0x7F_FFFF
0x7F_F800–0x7F_FFFF
0x7F_F000–0x7F_FFFF
Global Address Range
Table 19-19
FPLDIS
19-19. The FPHS bits can only be written to while the FPHDIS bit is set.
19-20. The FPLS bits can only be written to while the FPLDIS bit is set.
1
0
1
0
1
0
1
0
for the P-Flash block.
and
No P-Flash Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full P-Flash Memory Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
Table
19-20.
Function
128 KByte Flash Module (S12XFTMR128K1V1)
Protected Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
1
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