MC9S08GT60ACFBE Freescale Semiconductor, MC9S08GT60ACFBE Datasheet - Page 14

IC MCU 60K FLASH 4K RAM 44-QFP

MC9S08GT60ACFBE

Manufacturer Part Number
MC9S08GT60ACFBE
Description
IC MCU 60K FLASH 4K RAM 44-QFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT60ACFBE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Part Number:
MC9S08GT60ACFBE
Manufacturer:
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Quantity:
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MC9S08GT60ACFBE
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MC9S08GT60ACFBER
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Section Number
13.4 Functional Description ..................................................................................................................215
13.5 Resets ............................................................................................................................................218
13.6 Interrupts .......................................................................................................................................218
13.7 Initialization/Application Information ..........................................................................................220
14.1 Introduction ...................................................................................................................................225
14.2 Signal Description .........................................................................................................................226
14.3 Functional Description ..................................................................................................................227
14.4 Resets ............................................................................................................................................233
14.5 Interrupts .......................................................................................................................................233
14.6 ATD Registers and Control Bits ....................................................................................................233
14
13.3.4 IIC Status Register (IIC1S) ............................................................................................213
13.3.5 IIC Data I/O Register (IIC1D) .......................................................................................214
13.4.1 IIC Protocol ...................................................................................................................215
13.6.1 Byte Transfer Interrupt ..................................................................................................219
13.6.2 Address Detect Interrupt ................................................................................................219
13.6.3 Arbitration Lost Interrupt ..............................................................................................219
14.1.1 Features ..........................................................................................................................225
14.1.2 Modes of Operation .......................................................................................................225
14.1.3 Block Diagram ...............................................................................................................225
14.2.1 Overview ........................................................................................................................226
14.3.1 Mode Control .................................................................................................................227
14.3.2 Sample and Hold ............................................................................................................228
14.3.3 Analog Input Multiplexer ..............................................................................................230
14.3.4 ATD Module Accuracy Definitions ...............................................................................230
14.6.1 ATD Control (ATDC) ....................................................................................................234
14.6.2 ATD Status and Control (ATD1SC) ..............................................................................236
14.6.3 ATD Result Data (ATD1RH, ATD1RL) ........................................................................237
13.4.1.1 START Signal ...............................................................................................216
13.4.1.2 Slave Address Transmission .........................................................................216
13.4.1.3 Data Transfer .................................................................................................216
13.4.1.4 STOP Signal ..................................................................................................217
13.4.1.5 Repeated START Signal ...............................................................................217
13.4.1.6 Arbitration Procedure ...................................................................................217
13.4.1.7 Clock Synchronization ..................................................................................217
13.4.1.8 Handshaking .................................................................................................218
13.4.1.9 Clock Stretching ............................................................................................218
14.1.2.1 Stop Mode .....................................................................................................225
14.1.2.2 Power Down Mode .......................................................................................225
14.2.1.1 Channel Input Pins — AD1P7–AD1P0 ........................................................227
14.2.1.2 ATD Reference Pins — V
14.2.1.3 ATD Supply Pins — V
Analog-to-Digital Converter (S08ATDV3)
MC9S08GB60A Data Sheet, Rev. 2
Chapter 14
Title
DDAD
REFH
, V
, V
SSAD ........................................................................... 227
REFL ....................................................................... 227
Freescale Semiconductor
Page

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