MC9S08GT60ACFBE Freescale Semiconductor, MC9S08GT60ACFBE Datasheet - Page 166

• Manufacturer Part Number: MC9S08GT60ACFBE
• Description: IC MCU 60K FLASH 4K RAM 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT60ACFBE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 36
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Processor Series: S08GT
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: M68EVB908GB60E, M68DEMO908GB60E
• Minimum Operating Temperature: - 40 C
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Timer/PWM (TPM)
1. The maximum frequency that is allowed as an external clock is one-fourth of the bus frequency.
2. When the TPMxCH0 pin is selected as the TPM clock source, the corresponding ELS0B:ELS0A control bits should be set to
10.7.2
The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.
Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where
they remain latched until the other byte is read. This allows coherent 16-bit reads in either order. The
coherency mechanism is automatically restarted by an MCU reset, a write of any value to TPMxCNTH or
TPMxCNTL, or any write to the timer status/control register (TPMxSC).
Reset clears the TPM counter registers.
166
0:0 so channel 0 does not try to use the same pin for a conflicting function.
Reset
Reset
W
W
R
R
Bit 15
Timer x Counter Registers (TPMxCNTH:TPMxCNTL)
Bit 7
0
0
7
7
CLKSB:CLKSA
PS2:PS1:PS0
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Figure 10-6. Timer x Counter Register High (TPMxCNTH)
0:0
0:1
1:0
1:1
Figure 10-7. Timer x Counter Register Low (TPMxCNTL)
14
0
6
0
6
6
Table 10-2. TPM Clock Source Selection
Table 10-3. Prescale Divisor Selection
Any write to TPMxCNTH clears the 16-bit counter.
Any write to TPMxCNTL clears the 16-bit counter.
13
MC9S08GB60A Data Sheet, Rev. 2
0
5
0
5
5
12
0
4
0
4
4
No clock selected (TPM disabled)
Bus rate clock (BUSCLK)
Fixed system clock (XCLK)
External source (TPMx Ext Clk)
11
TPM Clock Source to Prescaler Input
3
0
3
3
0
TPM Clock Source Divided-By
10
0
2
0
2
2
128
16
32
64
1
2
4
8
1
,
2
Freescale Semiconductor
9
0
1
0
1
1
Bit 8
Bit 0
0
0
0
0