MC9S08GT60ACFBE Freescale Semiconductor, MC9S08GT60ACFBE Datasheet - Page 83

IC MCU 60K FLASH 4K RAM 44-QFP

MC9S08GT60ACFBE

Manufacturer Part Number
MC9S08GT60ACFBE
Description
IC MCU 60K FLASH 4K RAM 44-QFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT60ACFBE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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6.2
Parallel I/O features, depending on package choice, include:
6.3
The MC9S08GBxxA/GTxxA has a total of 56 parallel I/O pins (one is output only) in seven 8-bit ports
(PTA–PTG). Not all pins are bonded out in all packages. Consult the pin assignment in
and
when they are not used by other on-chip peripheral systems.
After reset, BKGD/MS is enabled and therefore is not usable as an output pin until BKGDPE in SOPT is
cleared. The rest of the peripheral functions are disabled. After reset, all data direction and pullup enable
controls are set to 0s. These pins default to being high-impedance inputs with on-chip pullup devices
disabled.
The following paragraphs discuss each port and the software controls that determine each pin’s use.
6.3.1
Port A is an 8-bit port shared among the KBI keyboard interrupt inputs and general-purpose I/O. Any pins
enabled as KBI inputs will be forced to act as inputs.
Port A pins are available as general-purpose I/O pins controlled by the port A data (PTAD), data direction
(PTADD), pullup enable (PTAPE), and slew rate control (PTASE) registers. Refer to
I/O
Freescale Semiconductor
Controls,”
Connections,” for available parallel I/O pins. All of these pins are available for general-purpose I/O
Port A
A total of 56 general-purpose I/O pins in seven ports (PTG0 is output only)
High-current drivers on port C and port F pins
Hysteresis input buffers
Software-controlled pullups on each input pin
Software-controlled slew rate output buffers
Eight port A pins shared with KBI1
Eight port B pins shared with ATD1
Eight high-current port C pins shared with SCI2 and IIC1
Eight port D pins shared with TPM1 and TPM2
Eight port E pins shared with SCI1 and SPI1
Eight high-current port F pins
Eight port G pins shared with EXTAL, XTAL, and BKGD/MS
Features
Pin Descriptions
Port A and Keyboard Interrupts
for more information about general-purpose I/O control.
MCU Pin:
KBI1P7
PTA7/
Bit 7
KBI1P6
MC9S08GB60A Data Sheet, Rev. 2
PTA6/
Figure 6-2. Port A Pin Names
6
KBI1P5
PTA5/
5
KBI1P4
PTA4/
4
KBI1P3
PTA3/
3
KBI1P2
PTA2/
2
Chapter 6 Parallel Input/Output
KBI1P1
PTA1/
Section 6.4, “Parallel
1
Chapter 2, “Pins
KBI1P0
PTA0/
Bit 0
83

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