HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 436

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Notes: 1. In this sample program, the stack pointer (SP) is set at address FF80. As the stack area,
FLMCR:
EBR1:
EBR2:
TCSR:
STACK:
START:
; Set the bits in R0 following the description on the previous page. This program is a sample program to
; erase all blocks.
; #RAMSTR is starting destination address to which program is transferred in RAM.
; Set #RAMSTR to even number.
PRETST:
EBR2PW:
PWADD1:
404
2. In this sample program, the program written in a ROM area (including external space)
3. When executing this sample program in the on-chip ROM area or external space,
on-chip RAM addresses FF7E and FF7F are used. Therefore, when executing this
sample program, addresses FF7E and FF7F should not be used. In addition, the on-chip
RAM should not be disabled.
is transferred into the RAM area and executed in the RAM to which the program is
transferred. #RAMSTR in the program is the starting destination address in RAM to
which the program is transferred. #RAMSTR must be set to an even number.
#RAMSTR should be set to #START.
.RQU
.EQU
.EQU
.EQU
.EQU
.ALIGN2
MOV.W
MOV.W
MOV.W
MOV.W
MOV.W
ADD.W
MOV.W
SUB.W
MOV.B
CMP.B
BEQ
CMP.B
BMI
MOV.B
SUBX
BTST
BNE
BRA
BTST
BNE
INC
MOV.W
BRA
H'FF80
H'FF82
H'FF83
H'FFA8
H'FF80
#STACK,
#H'0FFF,
R0,
#RAMSTR,
#ERVADR,
R3,
#START,
R3,
#H'00,
#H'0C,
ERASES
#H'08,
EBR2PW
R1L,
#H'08,
R1H,
PREWRT
PWADD1
R1L,
PREWRT
R1L
@R2+,
PRETST
SP
R0
@EBR1
R2
R3
R2
R3
R2
R1L
R1L
R1L
R1H
R1H
R0H
R0L
R3
; Set stack pointer
; Select blocks to be erased (R0: EBR1/EBR2)
; Set EBR1/EBR2
; Starting transfer destination address (RAM)
;
; #RAMSTR + #ERVADR
;
; Address of data area used in RAM
: Used to test R1L bit in R0
; R1L = H'0C?
; If finished checking all R0 bits, branch to ERASES
;
; Test EBR1 if R1L
;
; R1L – 8
; Test R1H bit in EBR1 (R0H)
; If R1H bit in EBR1 (R0H) is 1, branch to PREWRT
; If R1H bit in EBR1 (R0H) is 0, branch to PWADD1
; Test R1L bit in EBR2 (R0L)
; If R1L bit in EBR2 (R0H) is 1, branch to PREWRT
; R1L + 1
; Dummy-increment R2
;
R1H
R1L
8, or EBR2 if R1L < 8
R2