HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 575

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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22.3
22.3.1
To enter software standby mode, set the standby bit (SSBY) in the system control register
(SYSCR) to 1, then execute the SLEEP instruction.
In software standby mode, the system clock stops and chip functions halt, including both CPU
functions and the functions of the on-chip supporting modules. Power consumption is reduced to
an extremely low level. The on-chip supporting modules and their registers are reset to their initial
states, but as long as a minimum necessary voltage supply is maintained, the contents of the CPU
registers and on-chip RAM remain unchanged. I/O ports retain their states.
22.3.2
The chip can be brought out of software standby mode by an RES input, STBY input, or external
interrupt input at the NMI pin, IRQ
Exit by Interrupt: When an NMI, IRQ
clock oscillator begins operating. After the waiting time set in bits STS2 to STS0 of SYSCR, a
stable clock is supplied to the entire chip, software standby mode is released, and interrupt
exception-handling begins. IRQ
transition to software standby (clear IRQ3E, IRQ4E, IRQ5E, and IRQ7E to 0).
Exit by RES Pin: When the RES input goes low, the clock oscillator begins operating. When
RES is brought to the high level (after allowing time for the clock oscillator to settle), the CPU
starts reset exception handling. Be sure to hold RES low long enough for clock oscillation to
stabilize.
Exit by STBY Pin: When the STBY input goes low, the chip exits from software standby mode
to hardware standby mode.
Software Standby Mode
Transition to Software Standby Mode
Exit from Software Standby Mode
3
, IRQ
0
to IRQ
4
, IRQ
0
, IRQ
2
5
pins, or IRQ
, and IRQ
1
, IRQ
2
, or IRQ
7
interrupts should be disabled before the
6
pin (including KEYIN
6
interrupt request signal is input, the
0
to KEYIN
7
).
543

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