HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 437

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

; Execute prewrite
PREWRT:
PREW:
PREWRS:
LOOPR1:
LOOPR2:
ABEND1:
PWVFOK:
PWADD2:
; Execute erase
ERASES:
ERASE:
LOOPE:
MOV.W
MOV.B
MOV.W
INC
MOV.B
MOV.B
MOV.W
MOV.W
MOV.W
BSET
SUBS
MOV.W
BNE
BCLR
MOV.W
MOV.W
MOV.B
DEC
BNE
MOV.B
BEQ
CMP.B
BEQ
BRA
ADDS
MOV.W
CMP.W
BNE
INC
BRA
MOV.W
MOV.W
ADDS
MOV.W
MOV.W
MOV.W
BSET
NOP
NOP
NOP
NOP
SUBS
MOV.W
BNE
BCLR
MOV.W
MOV.W
Programming error
@R2+,
#H'00,
#H'a,
R6L
#H'00,
R1H,
#H'A578,
R4,
R5,
#0,
#1,
R4,
LOOPR1
#0,
#H'A500,
R4,
#H'c,
R4H
LOOPR2
@R3,
PWVFOK
#H'32,
ABEND1
PREWRS
#1,
@R2,
R4,
PREW
R1L
PRETST
#H'0000,
#H'd,
#1,
#H'e,
R4,
R5,
#1,
#1,
R4,
LOOPE
#1,
#H'A500,
R4,
R3
R6L
R5
R1H
@R3
R4
@TCSR
R4
@FLMCR:8
R4
R4
@FLMCR:8
R4
@TCSR
R4H
R1H
R6L
R3
R4
R3
R6
R5
R6
R4
@TCSR
R4
@FLMCR:8
R4
R4
@FLMCR:8
R4
@TCSR
; Prewrite starting address
; Prewrite-verify fail counter
; Prewrite-verify loop counter
; Prewrite-verify fail counter + 1
;
; Write H'00
;
; Start watchdog timer
; Set prewrite loop counter
;
;
; Wait loop
;
; Stop watchdog timer
; Set prewrite-verify loop counter
;
; Wait loop
; Read data = H'00?
; If read data = H'00 branch to PWVFOK
; Prewrite-verify executed 50 times?
; If prewrite-verify executed 50 times, branch to ABEND1
; Prewrite again
; Address + 1
; Top address of next block
; Last address?
; If not last address, prewrite next address
; Used to test R1L+1 bit in R0
; Branch to PRETST
; Erase-verify fail counter
; Set erase loop count
; Erase-verify fail counter + 1
;
; Start watchdog timer
; Set erase loop counter
;
;
; Wait loop
;
; Stop watchdog timer
;
;
;
;
Set P bit
Clear P bit
Set E bit
Clear E bit
R3
R6
R6L
405