HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 477

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Boot-Mode Execution Procedure: Figure 20.4 shows the boot-mode execution procedure.
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1
2
3
4
5
6
7
8
9
H8/3337YF branches to H'F7E0 in RAM area and
After checking that all data in flash memory is H'FF,
H8/3337YF transmits one H'AA data byte to host
After completing bit-rate alignment, H8/3337YF
H8/3337YF transmits one H'AA data byte to host
executes user program downloaded into RAM
H8/3337YF receives two bytes indicating byte
After receiving H'55, H8/3337YF sends part of
completion of bit-rate alignment, is received
sends one H'00 data byte to host to indicate
H8/3337YF calculates number of bytes left
area (H'F800 to H'FF2F), then checks the
Program H8/3337YF pins for boot mode,
After transferring the user program to RAM,
length (N) of program to be downloaded
H8/3337YF transfers one user program
Host transmits H'00 data continuously
normally, then transmits one H'55 byte
H8/3337YF branches to the RAM boot
data in the user area of flash memory
Host checks that this byte, indicating
H8/3337YF computes bit rate and
of H'00 data transmitted from host
H8/3337YF measures low period
to be transferred (N = N – 1)
that alignment is completed
the boot program to RAM
All bytes transferred?
sets bit rate register
All data = H'FF?
to on-chip RAM
at desired bit rate
byte to RAM
and reset
(N = 0?)
Start
Yes
Yes
*2
*1
*4
memory blocks
Figure 20.4 Boot Mode Flowchart
Erase all flash
No
No
*3,*4
1. Program the H8/3337YF pins for boot mode, and start the
2. Set the host’s data format to 8 bits + 1 stop bit, select the
3. The H8/3337YF repeatedly measures the low period of
4. When SCI bit-rate alignment is completed, the
5. The host should receive the byte transmitted from the
6. After receiving H'55, H8/3337YF sends part of the boot
7. After branching to the boot program area (H'F800 to
8. After the H8/3337YF transmits one H'AA data byte, the
9. The H8/3337YF stores the received user program in on-
10. After transmitting one H'AA data byte, the H8/3337YF
Notes: *1 The user can use 1934 bytes of RAM. The
H8/3337YF from a reset.
desired bit rate (2400, 4800, or 9600 bps), and transmit
H'00 data continuously.
the RxD1 pin and calculates the host’s asynchronous-
communication bit rate.
H8/3337YF transmits one H'00 data byte to indicate
completion of alignment.
H8/3337YF to indicate that bit-rate alignment is
completed, check that this byte is received normally, then
transmit one H'55 byte.
program to H'F780 to H'F7DF and H'F800 to H'FF2F of
RAM.
H'FF2F) in RAM, the H8/3337YF checks whether the
flash memory already contains any programmed data. If
so, all blocks are erased.
host transmits the byte length of the user program to be
transferred to the H8/3337YF. The byte length must be
sent as two-byte data, upper byte first and lower byte
second. After that, the host proceeds to transmit the user
program. As verification, the H8/3337YF echoes each
byte of the received byte-length data and user program
back to the host.
chip RAM in a 1934-byte area from H'F7E0 to H'FF6D.
branches to address H'F7E0 in on-chip RAM and
executes the user program stored in the area from
H'F7E0 to H'FF6D.
*2 The part of the user program that controls the
*3 If a memory cell malfunctions and cannot be
*4 H’0000 to H'EF7F in mode2 and H'0000 to H'F77F
number of bytes transferred must not exceed 1934
bytes. Be sure to transmit the byte length in two
bytes, upper byte first and lower byte second. For
example, if the byte length of the program to be
transferred is 256 bytes (H'0100), transmit H'01 as
the upper byte, followed by H'00 as the lower byte.
flash memory should be coded according to the
flash memory write/erase algorithms given later.
erased, the H8/3337YF transmits one H'FF byte to
report an erase error, halts erasing, and halts
further operations.
in mode 3.
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