HD6417750SF167V Renesas Electronics America, HD6417750SF167V Datasheet - Page 256

MPU 3V 16K PB-FREE 208-QFP

HD6417750SF167V

Manufacturer Part Number
HD6417750SF167V
Description
MPU 3V 16K PB-FREE 208-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SF167V

Core Processor
SH-4
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SF167V
Manufacturer:
INTERSIL
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Part Number:
HD6417750SF167V
Manufacturer:
Renesas Electronics America
Quantity:
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Section 5 Exceptions
(7) Instruction Address Error
• Sources:
• Transition address: VBR + H'0000 0100
• Transition operations:
Rev.7.00 Oct. 10, 2008 Page 170 of 1074
REJ09B0366-0700
Instruction_address_error()
{
}
⎯ Instruction fetch from other than a word boundary (2n +1)
⎯ Instruction fetch from area H'8000 0000–H'FFFF FFFF in user mode
The virtual address (32 bits) at which this exception occurred is set in TEA, and the
corresponding virtual page number (22 bits) is set in PTEH [31:10]. ASID in PTEH indicates
the ASID when this exception occurred.
The PC and SR contents for the instruction at which this exception occurred are saved in SPC
and SSR, and the contents of R15 are saved in SGR.
Exception code H'0E0 is set in EXPEVT. The BL, MD, and RB bits are set to 1 in SR, and a
branch is made to PC = VBR + H'0100. For details, see section 3, Memory Management Unit
(MMU).
TEA = EXCEPTION_ADDRESS;
PTEN.VPN = PAGE_NUMBER;
SPC = PC;
SSR = SR;
SGR = R15;
EXPEVT = H'000000E0;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = VBR + H'00000100;

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