SAK-XC888CLM-8FFA 5V AC Infineon Technologies, SAK-XC888CLM-8FFA 5V AC Datasheet - Page 38

• Manufacturer Part Number: SAK-XC888CLM-8FFA 5V AC
• Description: IC MCU 8BIT FLASH 64-LQFP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAK-XC888CLM-8FFA 5V AC

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 103.2MHz
• Connectivity: CAN, LIN, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.75K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1.75 KB
• Interface Type: UART, SSC
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: B158-H8743-X-X-7600IN - KIT STARTER XC886/888
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000210982

3.2.4
The SFRs of the XC886/888 are organized into groups according to their functional units.
The contents (bits) of the SFRs are summarized in
Note: The addresses of the bitaddressable SFRs appear in bold typeface.
3.2.4.1
The CPU SFRs can be accessed in both the standard and mapped memory areas
(RMAP = 0 or 1).
Table 5
Addr Register Name
RMAP = 0 or 1
81 H
82 H
83 H
87 H
88 H
89 H
8A H
8B H
8C H
8D H
98 H
99 H
A2 H
Data Sheet
SP
Stack Pointer Register
DPL
Data Pointer Register Low
DPH
Data Pointer Register High
PCON
Power Control Register
TCON
Timer Control Register
TMOD
Timer Mode Register
TL0
Timer 0 Register Low
TL1
Timer 1 Register Low
TH0
Timer 0 Register High
TH1
Timer 1 Register High
SCON
Serial Channel Control Register
SBUF
Serial Data Buffer Register
EO
Extended Operation Register
XC886/888 Register Overview
CPU Registers
CPU Register Overview
Reset: 07 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Bit
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
SMOD
GATE
DPH7
DPL7
SM0
TF1
rwh
rw
rw
rw
rw
rw
7
1
31
DPH6
DPL6
SM1
TR1
T1S
rw
rw
rw
rw
rw
6
0
r
DPH5
DPL5
Chapter 3.2.4.1
SM2
TF0
rwh
rw
rw
rw
5
0
r
T1M
rw
TRAP_
DPH4
DPL4
REN
TR0
EN
rw
rw
rw
rw
rw
4
VAL
VAL
VAL
VAL
VAL
rwh
rwh
rwh
rwh
rwh
SP
rw
Functional Description
DPH3
GATE
DPL3
GF1
TB8
rwh
IE1
rw
rw
rw
rw
rw
3
0
to
XC886/888CLM
Chapter
DPH2
DPL2
GF0
RB8
T0S
rwh
IT1
rw
rw
rw
rw
rw
2
0
r
V1.2, 2009-07
DPH1
DPL1
rwh
rwh
IE0
rw
rw
TI
1
0
r
3.2.4.14.
T0M
rw
DPSE
DPH0
DPL0
IDLE
rwh
IT0
rw
rw
rw
rw
L0
rw
RI
0