UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 282

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(2) Asynchronous serial interface reception error status register 0 (ASIS0)
280
Address: FF73H After reset: 00H R
Cautions 1. The operation of the PE0 bit differs depending on the set values of the PS01 and PS00 bits of
Symbol
ASIS0
This register indicates an error status on completion of reception by serial interface UART0. It includes three
error flag bits (PE0, FE0, OVE0).
This register is read-only by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H if bit 7 (POWER0) and bit 5 (RXE0) of ASIM0 = 0. 00H is read
when this register is read. If a reception error occurs, read ASIS0 and then read receive buffer register 0 (RXB0)
to clear the error flag.
Figure 13-3. Format of Asynchronous Serial Interface Reception Error Status Register 0 (ASIS0)
2. Only the first bit of the receive data is checked as the stop bit, regardless of the number of
3. If an overrun error occurs, the next receive data is not written to receive buffer register 0
4. If data is read from ASIS0, a wait cycle is generated. Do not read data from ASIS0 when the
OVE0
PE0
FE0
asynchronous serial interface operation mode register 0 (ASIM0).
stop bits.
(RXB0) but discarded.
CPU is operating on the subsystem clock and the peripheral hardware clock is stopped. For
details, see CHAPTER 31 CAUTIONS FOR WAIT.
7
0
0
1
0
1
0
1
If POWER0 = 0 and RXE0 = 0, or if ASIS0 register is read.
If the parity of transmit data does not match the parity bit on completion of reception.
If POWER0 = 0 and RXE0 = 0, or if ASIS0 register is read.
If the stop bit is not detected on completion of reception.
If POWER0 = 0 and RXE0 = 0, or if ASIS0 register is read.
If receive data is set to the RXB0 register and the next reception operation is completed before the
data is read.
6
0
CHAPTER 13 SERIAL INTERFACE UART0
5
0
User’s Manual U17504EJ2V0UD
Status flag indicating framing error
Status flag indicating overrun error
Status flag indicating parity error
4
0
3
0
PE0
2
FE0
1
OVE0
0