UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 527

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(3) Port mode register 12 (PM12)
24.4 Operation of Low-Voltage Detector
(1) Used as reset
(2) Used as interrupt
The low-voltage detector can be used in the following two modes.
When using the P120/EXLVI/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At this
time, the output latch of P120 may be 0 or 1.
PM12 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM12 to FFH.
Remark LVISEL: Bit 2 of low-voltage detection register (LVIM)
If LVISEL = 0, compares the supply voltage (V
signal when V
If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (V
V (TYP.)), generates an internal reset signal when EXLVI < V
V
If LVISEL = 0, compares the supply voltage (V
signal (INTLVI) when V
If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (V
V (TYP.)), and generates an interrupt signal (INTLVI) when EXLVI < V
Address: FF2CH
Symbol
EXLVI
PM12
.
PM12n
DD
7
1
0
1
< V
After reset: FFH
LVI
, and releases internal reset when V
Output mode (output buffer on)
Input mode (output buffer off)
Figure 24-4. Format of Port Mode Register 12 (PM12)
DD
< V
6
1
LVI
CHAPTER 24 LOW-VOLTAGE DETECTOR
.
R/W
5
1
User’s Manual U17504EJ2V0UD
P12n pin I/O mode selection (n = 0 to 4)
PM124
DD
DD
4
) and detection voltage (V
) and detection voltage (V
DD
PM123
3
EXLVI
V
LVI
, and releases internal reset when EXLVI
.
EXLVI
PM122
2
.
LVI
LVI
), generates an internal reset
), and generates an interrupt
PM121
1
PM120
0
EXLVI
EXLVI
= 1.21
= 1.21
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