UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 293

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(2) Generation of serial clock
A serial clock to be generated can be specified by using baud rate generator control register 0 (BRGC0).
Select the clock to be input to the 5-bit counter by using bits 7 and 6 (TPS01 and TPS00) of BRGC0.
Bits 4 to 0 (MDL04 to MDL00) of BRGC0 can be used to select the division value (f
counter.
(a) Baud rate
(b) Error of baud rate
The baud rate can be calculated by the following expression.
f
k:
The baud rate error can be calculated by the following expression.
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at
XCLK0
Baud rate =
Error (%) =
Example: Frequency of base clock = 2.5 MHz = 2,500,000 Hz
TPS01
: Frequency of base clock selected by the TPS01 and TPS00 bits of the BRGC0 register
Value set by the MDL04 to MDL00 bits of the BRGC0 register (k = 8, 9, 10, ..., 31)
0
0
1
1
2. Make sure that the baud rate error during reception satisfies the range shown in (4)
f
the reception destination.
Permissible baud rate range during reception.
2
XCLK0
Set value of MDL04 to MDL00 bits of BRGC0 register = 10000B (k = 16)
Target baud rate = 76,800 bps
Baud rate = 2.5 M/(2
Error = (78,125/76,800
Actual baud rate (baud rate with error)
Desired baud rate (correct baud rate)
TPS00
k
0
1
0
1
= 1.725 [%]
[bps]
= 2,500,000/(2
TM50 output
f
f
f
Table 13-4. Set Value of TPS01 and TPS00
PRS
PRS
PRS
CHAPTER 13 SERIAL INTERFACE UART0
/2
/2
/2
3
5
User’s Manual U17504EJ2V0UD
16)
1)
1 MHz
250 kHz
62.5 kHz
f
PRS
16) = 78,125 [bps]
100
= 2 MHz
Base clock (f
2.5 MHz
625 kHz
156.25 kHz
1
f
PRS
= 5 MHz
XCLK0
100 [%]
) selection
f
5 MHz
1.25 MHz
312.5 kHz
PRS
= 10 MHz
XCLK0
/8 to f
f
10 MHz
2.5 MHz
625 kHz
PRS
= 20 MHz
XCLK0
/31) of the 5-bit
291