DS87C520-QNL+T&R Maxim Integrated Products, DS87C520-QNL+T&R Datasheet - Page 14

• Manufacturer Part Number: DS87C520-QNL+T&R
• Description: IC MCU EPROM/ROM 33MH IND 44PLCC
• Manufacturer: Maxim Integrated Products
• Series: 87Cr

Specifications of DS87C520-QNL+T&R

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LCC, 44-PLCC
• Processor Series: DS87C520
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 8051
• Family Name: 87C
• Maximum Speed: 33 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

POWER MANAGEMENT
Along with the standard Idle and power down (Stop) modes of the standard 80C52, the
DS87C520/DS83C520 provide a new Power Management Mode. This mode allows the processor to
continue functioning, yet to save power compared with full operation. The DS87C520/DS83C520 also
feature several enhancements to Stop mode that make it more useful.
POWER MANAGEMENT MODE (PMM)
Power Management Mode offers a complete scheme of reduced internal clock speeds that allow the CPU
to run software but to use substantially less power. During default operation, the DS87C520/DS83C520
use four clocks per machine cycle. Thus the instruction cycle rate is Clock/4. At 33MHz crystal speed,
the instruction cycle speed is 8.25MHz (33/4). In PMM, the microcontroller continues to operate but uses
an internally divided version of the clock source. This creates a lower power state without external
components. It offers a choice of two reduced instruction cycle speeds (and two clock sources - discussed
below). The speeds are (Clock/64) and (Clock/1024).
Software is the only mechanism to invoke the PMM. Table 4 illustrates the instruction cycle rate in PMM
for several common crystal frequencies. Since power consumption is a direct function of operating speed,
PMM 1 eliminates most of the power consumption while still allowing a reasonable speed of processing.
PMM 2 runs very slow and provides the lowest power consumption without stopping the CPU. This is
illustrated in Table 5.
Note that PMM provides a lower power condition than Idle mode. This is because in Idle mode, all
clocked functions such as timers run at a rate of crystal divided by 4. Since wake-up from PMM is as fast
as or faster than from Idle, and PMM allows the CPU to operate (even if doing NOPs), there is little
reason to use Idle mode in new designs.
Table 4. Machine Cycle Rate
Table 5. Typical Operating Current in PMM
CRYSTAL SPEED
CRYSTAL SPEED
11.0592
11.0592
(MHz)
(MHz)
16
25
33
16
25
33
FULL OPERATION
FULL OPERATION
(4 CLOCKS)
(4 CLOCKS)
(MHz)
2.765
(mA)
4.00
6.25
8.25
13.1
17.2
25.7
32.8
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
14 of 43
(64 CLOCKS)
(64 CLOCKS)
PMM1
PMM1
(kHz)
172.8
250.0
390.6
515.6
(mA)
5.3
6.4
8.1
9.8
(1024 CLOCKS)
(1024 CLOCKS)
PMM2
PMM2
(kHz)
(mA)
10.8
15.6
24.4
32.2
4.8
5.6
7.0
8.2