DS87C520-QNL+T&R Maxim Integrated Products, DS87C520-QNL+T&R Datasheet - Page 17

• Manufacturer Part Number: DS87C520-QNL+T&R
• Description: IC MCU EPROM/ROM 33MH IND 44PLCC
• Manufacturer: Maxim Integrated Products
• Series: 87Cr

Specifications of DS87C520-QNL+T&R

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LCC, 44-PLCC
• Processor Series: DS87C520
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 8051
• Family Name: 87C
• Maximum Speed: 33 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
Crystal/Ring Operation
The DS87C520/DS83C520 allow software to choose the clock source as an independent selection from
the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under
software control. Power-on reset default is the crystal (or external clock) source. The ring may save
power depending on the actual crystal speed. To save still more power, software can then disable the
crystal amplifier. This process requires two steps. Reversing the process also requires two steps.
The XT/
bit (EXIF.3) selects the crystal or ring as the clock source. Setting XT/
= 1 selects the
RG
RG
crystal. Setting XT/
= 0 selects the ring. The RGMD (EXIF.2) bit serves as a status bit by indicating
RG
the active clock source. RGMD = 0 indicates the CPU is running from the crystal. RGMD = 1 indicates it
is running from the ring. When operating from the ring, disable the crystal amplifier by setting the
XTOFF bit (PMR.3) to 1. This can only be done when XT/
= 0.
RG
When changing the clock source, the selection will take effect after a one-instruction cycle delay. This
applies to changes from crystal to ring and vise versa. However, this assumes that the crystal amplifier is
running. In most cases, when the ring is active, software previously disabled the crystal to save power. If
ring operation is being used and the system must switch to crystal operation, the crystal must first be
enabled. Set the XTOFF bit to 0. At this time, the crystal oscillation will begin. The
DS87C520/DS83C520 then provide a warm-up delay to make certain that the frequency is stable.
Hardware will set the XTUP bit (STATUS.4) to a 1 when the crystal is ready for use. Then software
should write XT/
to 1 to begin operating from the crystal. Hardware prevents writing XT/
to 1
RG
RG
before XTUP=1. The delay between XTOFF = 0 and XTUP = 1 will be 65,536 crystal clocks in addition
to the crystal cycle startup time.
Switchback has no effect on the clock source. If software selects a reduced clock divider and enables the
ring, a Switchback will only restore the divider speed. The ring will remain as the time base until altered
by software. If there is serial activity, Switchback usually occurs with enough time to create proper baud
rates. This is not true if the crystal is off and the CPU is running from the ring. If sending a serial
character that wakes the system from crystal-less PMM, then it should be a dummy character of no
importance with a subsequent delay for crystal startup.
Figure 3 illustrates a typical decision set associated with PMM. Table 6 is a summary of the bits relating
to PMM and its operation.
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