DS87C520-QNL+T&R Maxim Integrated Products, DS87C520-QNL+T&R Datasheet - Page 26

• Manufacturer Part Number: DS87C520-QNL+T&R
• Description: IC MCU EPROM/ROM 33MH IND 44PLCC
• Manufacturer: Maxim Integrated Products
• Series: 87Cr

Specifications of DS87C520-QNL+T&R

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LCC, 44-PLCC
• Processor Series: DS87C520
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 8051
• Family Name: 87C
• Maximum Speed: 33 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 9. EPROM Programming Modes
Table 10. DS87C520 EPROM Lock Bits
SECURITY OPTIONS
The DS87C520 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64-
byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted
form.
Lock Bits
The security lock consists of three lock bits. These bits select a total of four levels of security. Higher
levels provide increasing security but also limit application flexibility. Table 10 shows the security
settings. Note that the programmer cannot directly read the state of the security lock. User software has
access to this information as described in the Memory section.
Program Code Data
Verify Code Data
Program Encryption Array
Address 0-3Fh
Program Lock Bits
Program Option Register
Address FCh
Read Signature or Option
Registers 30, 31, 60 FCh
LEVEL
1
2
3
4
MODE
LB1
U
P
P
P
LB1
LB2
LB3
LOCK BITS
LB2
U
U
P
P
RST
H
H
H
H
H
H
H
H
PSEN
LB3
L
L
L
L
L
L
L
L
U
U
U
P
ALE/PROG
No program lock. Encrypted verify if encryption table was
programmed.
Prevent MOVC instructions in external memory from reading
program bytes in internal memory. EA is sampled and latched on
reset. Allow no further programming of EPROM.
Level 2 plus no verify operation. Also, prevent MOVX
instructions in external memory from reading SRAM (MOVX) in
internal memory.
Level 3 plus no external execution.
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
PL
PL
PL
PL
PL
PL
H
H
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EA/VPP
12.75V
12.75V
12.75V
12.75V
12.75V
12.75V
H
H
PROTECTION
P2.6
H
H
L
H
L
L
L
L
P2.7
H
H
H
H
H
L
L
L
P3.3
H
H
H
H
H
H
L
L
P3.6
H
H
H
H
L
L
L
L
P3.7
H
H
H
H
L
L
L
L