ATMEGA162-16PJ Atmel, ATMEGA162-16PJ Datasheet - Page 140

IC MCU AVR 16K 5V 16MHZ 40-DIP

ATMEGA162-16PJ

Manufacturer Part Number
ATMEGA162-16PJ
Description
IC MCU AVR 16K 5V 16MHZ 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16PJ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Counter Unit
Output Compare
Unit
140
ATmega162/V
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
60
Figure 60. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
selected by the Clock Select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk
count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in
the Timer/Counter Control Register (TCCR2). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the Output Compare output
OC2. For more details about advanced counting sequences and waveform generation, see
“Modes of Operation” on page
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by
the WGM21:0 bits.
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2). Whenever TCNT2 equals OCR2, the comparator signals a match. A match will set the
Output Compare Flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 = 1), the Output
Compare Flag generates an output compare interrupt. The OCF2 Flag is automatically cleared
when the interrupt is executed. Alternatively, the OCF2 Flag can be cleared by software by writ-
ing a logical one to its I/O bit location. The waveform generator uses the match signal to
generate an output according to operating mode set by the WGM21:0 bits and Compare Output
mode (COM21:0) bits. The max and bottom signals are used by the waveform generator for han-
dling the special cases of the extreme values in some modes of operation
on page
Figure 61
count
direction
clear
clk
top
bottom
shows a block diagram of the counter and its surrounding environment.
T
2
143).
DATA BUS
shows a block diagram of the output compare unit.
T
TCNTn
2 is present or not. A CPU write overrides (has priority over) all counter clear or
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
TOV2
T
2). clk
can be used for generating a CPU interrupt.
direction
count
clear
bottom
143.
T
2 can be generated from an external or internal clock source,
Control Logic
top
TOVn
(Int.Req.)
clk
Tn
Prescaler
Oscillator
(“Modes of Operation”
T/C
clk
I/O
2513K–AVR–07/09
TOSC2
TOSC1
Figure

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