ATMEGA162-16PJ Atmel, ATMEGA162-16PJ Datasheet - Page 253

• Manufacturer Part Number: ATMEGA162-16PJ
• Description: IC MCU AVR 16K 5V 16MHZ 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16PJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

Data Registers
Reset Register
Programming Enable
Register
2513K–AVR–07/09
The Data Registers are selected by the JTAG Instruction Registers described in section
gramming Specific JTAG Instructions” on page
programming operations are:
•
•
•
•
•
The Reset Register is a test data register used to reset the part during programming. It is
required to reset the part before entering Programming mode.
A high value in the Reset Register corresponds to pulling the external reset low. The part is reset
as long as there is a high value present in the Reset Register. Depending on the fuse settings for
the clock options, the part will remain reset for a Reset Time-out period (refer to
on page
so the reset will take place immediately, as shown in
The Programming Enable Register is a 16-bit register. The contents of this register is compared
to the programming enable signature, binary code 1010_0011_0111_0000. When the contents
of the register is equal to the programming enable signature, programming via the JTAG port is
enabled. The register is reset to 0 on Power-on Reset, and should always be reset when leaving
Programming mode.
Figure 108. Programming Enable Register
Reset Register
Programming Enable Register.
Programming Command Register.
Virtual Flash Page Load Register.
Virtual Flash Page Read Register.
36) after releasing the Reset Register. The output from this data register is not latched,
TDO
TDI
D
A
T
A
0xA370
ClockDR & PROG_ENABLE
=
D
Q
Figure 86 on page
250. The Data Registers relevant for
Programming Enable
ATmega162/V
206.
“Clock Sources”
“Pro-
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