ATMEGA162-16PJ Atmel, ATMEGA162-16PJ Datasheet - Page 46

• Manufacturer Part Number: ATMEGA162-16PJ
• Description: IC MCU AVR 16K 5V 16MHZ 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16PJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

Minimizing Power
Consumption
Analog Comparator
Brown-out Detector
Internal Voltage
Reference
Watchdog Timer
Port Pins
JTAG Interface and
On-chip Debug
System
46
ATmega162/V
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
When entering Idle mode, the Analog Comparator should be disabled if not needed. In the other
sleep modes, the Analog Comparator is automatically disabled. However, if the Analog Compar-
ator is set up to use the Internal Voltage Reference as input, the Analog Comparator should be
disabled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled, indepen-
dent of sleep mode. Refer to
the Analog Comparator.
If the Brown-out Detector is not needed in the application, this module should be turned off. If the
Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes,
and hence, always consume power. In the deeper sleep modes, this will contribute significantly
to the total current consumption. Refer to
configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detector or the
Analog Comparator. If these modules are disabled as described in the sections above, the inter-
nal voltage reference will be disabled and it will not be consuming power. When turned on again,
the user must allow the reference to start up before the output is used. If the reference is kept on
in sleep mode, the output can be used immediately. Refer to
page 52
If the Watchdog Timer is not needed in the application, this module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important thing is to ensure that no pins drive resistive loads. In sleep modes where the I/O
clock (clk
power is consumed by the input logic when not needed. In some cases, the input logic is needed
for detecting wake-up conditions, and it will then be enabled. Refer to the section
Enable and Sleep Modes” on page 67
enabled and the input signal is left floating or have an analog signal level close to V
input buffer will use excessive power.
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enter Power down or
Power save sleep mode, the main clock source remains enabled. In these sleep modes, this will
contribute significantly to the total current consumption. There are three alternative ways to
avoid this:
•
•
•
The TDO pin is left floating when the JTAG interface is enabled while the JTAG TAP controller is
not shifting data. If the hardware connected to the TDO pin does not pull up the logic level,
power consumption will increase. Note that the TDI pin for the next device in the scan chain con-
tains a pull-up that avoids this problem. Writing the JTD bit in the MCUCSR register to one or
leaving the JTAG fuse unprogrammed disables the JTAG interface.
Disable OCDEN Fuse.
Disable JTAGEN Fuse.
Write one to the JTD bit in MCUCSR.
for details on the start-up time.
I/O
) is stopped, the input buffers of the device will be disabled. This ensures that no
“Watchdog Timer” on page 52
“Analog Comparator” on page 195
for details on which pins are enabled. If the input buffer is
“Brown-out Detection” on page 50
for details on how to configure the Watchdog Timer.
“Internal Voltage Reference” on
for details on how to configure
for details on how to
2513K–AVR–07/09
“Digital Input
CC
/2, the