ATMEGA162-16PJ Atmel, ATMEGA162-16PJ Datasheet - Page 182

IC MCU AVR 16K 5V 16MHZ 40-DIP

ATMEGA162-16PJ

Manufacturer Part Number
ATMEGA162-16PJ
Description
IC MCU AVR 16K 5V 16MHZ 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16PJ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Multi-processor
Communication
Mode
182
ATmega162/V
Table 71. Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode (U2X =
0)
Table 72. Recommended Maximum Receiver Baud Rate Error for Double Speed Mode (U2X =
1)
The recommendations of the maximum receiver baud rate error was made under the assump-
tion that the Receiver and Transmitter equally divides the maximum total error.
There are two possible sources for the receivers baud rate error. The receiver’s system clock
(XTAL) will always have some minor instability over the supply voltage range and the tempera-
ture range. When using a crystal to generate the system clock, this is rarely a problem, but for a
resonator the system clock may differ more than 2% depending of the resonators tolerance. The
second source for the error is more controllable. The baud rate generator can not always do an
exact division of the system frequency to get the baud rate wanted. In this case an UBRR value
that gives an acceptable low error can be used if possible.
Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering
function of incoming frames received by the USART Receiver. Frames that do not contain
address information will be ignored and not put into the receive buffer. This effectively reduces
the number of incoming frames that has to be handled by the CPU, in a system with multiple
MCUs that communicate via the same serial bus. The Transmitter is unaffected by the MPCM
setting, but has to be used differently when it is a part of a system utilizing the Multi-processor
Communication mode.
If the receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indi-
cates if the frame contains data or address information. If the receiver is set up for frames with
nine data bits, then the ninth bit (RXB8) is used for identifying address and data frames. When
the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the
frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data from a
Master MCU. This is done by first decoding an address frame to find out which MCU has been
# (Data+Parity Bit)
# (Data+Parity Bit)
10
10
D
D
5
6
7
8
9
5
6
7
8
9
R
R
slow
slow
93.20
94.12
94.81
95.36
95.81
96.17
94.12
94.92
95.52
96.00
96.39
96.70
(%)
(%)
R
R
106.67
105.79
105.11
104.58
104.14
103.78
105.66
104.92
104.35
103.90
103.53
103.23
fast
fast
(%)
(%)
Max. Total Error (%)
Max. Total Error (%)
+6.67/-6.8%
+5.79/-5.88
+5.11/-5.19
+4.58/-4.54
+4.14/-4.19
+5.66/-5.88
+4.92/-5.08
+4.35/-4.48
+3.90/-4.00
+3.53/-3.61
+3.23/-3.30
+3.7 /-3.83
Recommended Max.
Recommended Max.
Receiver Error (%)
Receiver Error (%)
± 3.0
± 2.5
± 2.0
± 2.0
± 1.5
± 1.5
± 2.5
± 2.0
± 1.5
± 1.5
± 1.5
± 1.0
2513K–AVR–07/09

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