Z8F6401VN020SC00TR Zilog, Z8F6401VN020SC00TR Datasheet - Page 12

• Manufacturer Part Number: Z8F6401VN020SC00TR
• Description: IC ENCORE MCU FLASH 64K 44PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F6401VN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6401VN020SC00T

List of Tables
PS017610-0404
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Z8F640x Family Part Selection Guide . . . . . . . . . . . . . . . . 2
Z8F640x Family Package Options . . . . . . . . . . . . . . . . . . . 6
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Pin Characteristics of the Z8F640x family . . . . . . . . . . . . 15
Z8F640x Family Program Memory Maps . . . . . . . . . . . . . 18
Z8F640x Family Data Memory Maps . . . . . . . . . . . . . . . . 19
Register File Address Map . . . . . . . . . . . . . . . . . . . . . . . . 20
Reset and STOP Mode Recovery Characteristics
and Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Reset Sources and Resulting Reset Type . . . . . . . . . . . . . . 26
STOP Mode Recovery Sources and Resulting Action . . . 29
Port Availability by Device and Package Type . . . . . . . . . 33
Port Alternate Function Mapping . . . . . . . . . . . . . . . . . . . 35
Port A-H GPIO Address Registers (PxADDR) . . . . . . . . . 37
GPIO Port Registers and Sub-Registers . . . . . . . . . . . . . . 37
Port A-H Control Registers (PxCTL) . . . . . . . . . . . . . . . . 38
Port A-H Data Direction Sub-Registers . . . . . . . . . . . . . . . 39
Port A-H Alternate Function Sub-Registers . . . . . . . . . . . 39
Port A-H Output Control Sub-Registers . . . . . . . . . . . . . . 40
Port A-H High Drive Enable Sub-Registers . . . . . . . . . . . 41
Port A-H Input Data Registers (PxIN) . . . . . . . . . . . . . . . . 42
Port A-H STOP Mode Recovery Source Enable
Sub-Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Port A-H Output Data Register (PxOUT) . . . . . . . . . . . . . 43
Interrupt Vectors in Order of Priority . . . . . . . . . . . . . . . . 45
Interrupt Request 0 Register (IRQ0) . . . . . . . . . . . . . . . . . 48
Interrupt Request 1 Register (IRQ1) . . . . . . . . . . . . . . . . . 49
Interrupt Request 2 Register (IRQ2) . . . . . . . . . . . . . . . . . 50
IRQ0 Enable and Priority Encoding . . . . . . . . . . . . . . . . . 51
IRQ0 Enable High Bit Register (IRQ0ENH) . . . . . . . . . . 51
IRQ0 Enable Low Bit Register (IRQ0ENL) . . . . . . . . . . . 52
IRQ1 Enable and Priority Encoding . . . . . . . . . . . . . . . . . 52
IRQ1 Enable Low Bit Register (IRQ1ENL) . . . . . . . . . . . 53
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!
List of Tables
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