MC68HC908GR16VFJ Freescale Semiconductor, MC68HC908GR16VFJ Datasheet - Page 190

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MC68HC908GR16VFJ

Manufacturer Part Number
MC68HC908GR16VFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16VFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Quantity
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Part Number:
MC68HC908GR16VFJ
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Quantity:
10 000
System Integration Module (SIM)
Setting the BCFE bit enables the clearing mechanisms. Once cleared in break mode, a flag remains
cleared even when break mode is exited. Status flags with a 2-step clearing mechanism — for example,
a read of one register followed by the read or write of another — are protected, even when the first step
is accomplished prior to entering break mode. Upon leaving break mode, execution of the second step
will clear the flag as normal.
15.6 Low-Power Modes
Executing the WAIT or STOP instruction puts the MCU in a low power-consumption mode for standby
situations. The SIM holds the CPU in a non-clocked state. The operation of each of these modes is
described in the following subsections. Both STOP and WAIT clear the interrupt mask (I) in the condition
code register, allowing interrupts to occur.
15.6.1 Wait Mode
In wait mode, the CPU clocks are inactive while the peripheral clocks continue to run.
the timing for wait mode entry.
A module that is active during wait mode can wakeup the CPU with an interrupt if the interrupt is enabled.
Stacking for the interrupt begins one cycle after the WAIT instruction during which the interrupt occurred.
In wait mode, the CPU clocks are inactive. Refer to the wait mode subsection of each module to see if the
module is active or inactive in wait mode. Some modules can be programmed to be active in wait mode.
Wait mode also can be exited by a reset (or break in emulation mode). A break interrupt during wait mode
sets the SIM break stop/wait bit, SBSW, in the SIM break status register (SBSR). If the COP disable bit,
COPD, in the mask option register is 0, then the computer operating properly module (COP) is enabled
and remains active in wait mode.
Figure 15-17
190
and
EXITSTOPWAIT
Note: EXITSTOPWAIT = RST pin or CPU interrupt
R/W
Figure 15-18
IAB
IDB
Note:
IDB
IAB
Previous data can be operand data or the WAIT opcode, depending on the
last instruction.
WAIT ADDR
$A6
Figure 15-17. Wait Recovery from Interrupt
show the timing for WAIT recovery.
PREVIOUS DATA
Figure 15-16. Wait Mode Entry Timing
$6E0B
$A6
MC68HC908GR16 Data Sheet, Rev. 5.0
WAIT ADDR + 1
$A6
$6E0C
NEXT OPCODE
$01
$00FF
$0B
SAME
$00FE
$6E
SAME
$00FD
SAME
$00FC
SAME
Freescale Semiconductor
Figure 15-16
shows

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