MC68HC908JL8CP Freescale Semiconductor, MC68HC908JL8CP Datasheet - Page 70

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MC68HC908JL8CP

Manufacturer Part Number
MC68HC908JL8CP
Description
IC MCU 8K FLASH 8MHZ 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JL8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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System Integration Module (SIM)
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions. However, in the case of the
INT1 RTI prefetch, this is a redundant operation.
5.5.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
5.5.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
70
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
INT1
INT2
Figure 5-11
CLI
LDA
PSHH
PULH
RTI
PSHH
PULH
RTI
#$FF
.
Interrupt Recognition Example
NOTE
NOTE
INT1 INTERRUPT SERVICE ROUTINE
INT2 INTERRUPT SERVICE ROUTINE
BACKGROUND ROUTINE
Table 5-3
Freescale Semiconductor
summarizes the

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