MC68HC908SR12CB Freescale Semiconductor, MC68HC908SR12CB Datasheet - Page 358

• Manufacturer Part Number: MC68HC908SR12CB
• Description: IC MCU 12K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908SR12CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, Temp Sensor
• Number Of I /o: 29
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Low-Voltage Inhibit (LVI)
22.4 Functional Description
Data Sheet
358
$FE0F
Addr.
Low-Voltage Inhibit Status
Register Name
Register
(LVISR)
Figure 22-2
out of reset. The LVI module contains a bandgap reference circuit and
comparator. Clearing the LVI power disable bit, LVIPWRD, enables the
LVI to monitor V
enables the LVI module to generate a reset when V
voltage, V
enables the LVI to operate in stop mode. Setting the LVI 5V or 3V trip
point bit, LVI5OR3, enables the trip point voltage, V
configured for 5V operation. Clearing the LVI5OR3 bit enables the trip
point voltage, V
points are shown in
Reset:
Read: LVIOUT
Write:
Figure 22-1. LVI I/O Register Summary
FROM CONFIG1
DETECTOR
LOW V
LVI5OR3
Bit 7
V
0
TRIPF
DD
DD
shows the structure of the LVI module. The LVI is enabled
Low-Voltage Inhibit (LVI)
Figure 22-2. LVI Module Block Diagram
= Unimplemented
. Setting the LVI enable in stop mode bit, LVISTOP,
TRIPF
DD
V
V
6
0
0
DD
DD
FROM CONFIG
voltage. Clearing the LVI reset disable bit, LVIRSTD,
Section 24. Electrical
> V
≤ V
LVIPWRD
, to be configured for 3V operation. The actual trip
TRIPR
TRIPF
5
0
0
= 1
= 0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
TO LVISR
LVIOUT
4
0
0
FROM CONFIG1
STOP INSTRUCTION
LVIRSTD
3
0
0
Specifications.
Freescale Semiconductor
2
0
0
TRIPF
DD
falls below a
FROM CONFIG1
, to be
LVI RESET
LVISTOP
1
0
0
Bit 0
0
0