MC68HC908SR12CB Freescale Semiconductor, MC68HC908SR12CB Datasheet - Page 89

no-image

MC68HC908SR12CB

Manufacturer Part Number
MC68HC908SR12CB
Description
IC MCU 12K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
29
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908SR12CB
Manufacturer:
TI/NSC
Quantity:
340
Part Number:
MC68HC908SR12CB
Manufacturer:
MOT
Quantity:
2 313
Part Number:
MC68HC908SR12CB
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Company:
Part Number:
MC68HC908SR12CB
Quantity:
1
Company:
Part Number:
MC68HC908SR12CB
Quantity:
7 840
6.6.2 Stop Mode
6.7 CPU During Break Interrupts
6.8 Instruction Set Summary
6.9 Opcode Map
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator
stabilization delay.
If a break module is present on the MCU, the CPU starts a break
interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
See
Table
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from stop mode by external
interrupt, the I bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD or with
$FEFC:$FEFD in monitor mode
6-2.
Central Processor Unit (CPU)
Central Processor Unit (CPU)
CPU During Break Interrupts
Data Sheet
89

Related parts for MC68HC908SR12CB