MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 43

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

1.1.11
There are four independent, DMA-transfer-generating 32-bit timers (DTIM0, DTIM1, DTIM2, DTIM3)
on the MCF5282. Each timer module incorporates a 32-bit timer with a separate register set for
configuration and control. The timers can be configured to operate from the system clock or from an
external clock source using one of the DTINx signals. If the system clock is selected, it can be divided by
16 or 1. The selected clock is further divided by a user-programmable 8-bit prescaler which clocks the
actual timer counter register (TCRn). Each of these timers can be configured for input capture or reference
compare mode. By configuring the internal registers, each timer may be configured to assert an external
signal, generate an interrupt on a particular event, or cause a DMA transfer.
1.1.12
The two general-purpose timers (GPTA and GPTB) are 4-channel timer modules. Each timer consists of a
16-bit programmable counter driven by a 7-stage programmable prescaler. Each of the four channels for
each timer can be configured for input capture or output compare. Additionally, one of the channels,
channel 3, can be configured as a pulse accumulator.
A timer overflow function allows software to extend the timing capability of the system beyond the 16-bit
range of the counter. The input capture and output compare functions allow simultaneous input waveform
measurements and output waveform generation. The input capture function can capture the time of a
selected transition edge. The output compare function can generate output waveforms and timer software
delays. The 16-bit pulse accumulator can operate as a simple event counter or a gated time accumulator.
1.1.13
The four periodic interrupt timers (PIT0, PIT1, PIT2, PIT3) are 16-bit timers that provide precise interrupts
at regular intervals with minimal processor intervention. Each timer can either count down from the value
written in its PIT modulus register, or it can be a free-running down-counter.
1.1.14
The watchdog timer is a 16-bit timer that facilitates recovery from runaway code. The watchdog counter
is a free-running down-counter that generates a reset on underflow. To prevent a reset, software must
periodically restart the countdown.
1.1.15
The clock module contains a crystal oscillator (OSC), phase-locked loop (PLL), reduced frequency divider
(RFD), status/control registers, and control logic. To improve noise immunity, the PLL and OSC have their
own power supply inputs, VDDPLL and VSSPLL. All other circuits are powered by the normal supply
pins, VDD and VSS.
1.1.16
The Direct Memory Access (DMA) controller module provides an efficient way to move blocks of data
with minimal processor interaction. The DMA module provides four channels (DMA0–DMA3) that allow
Freescale Semiconductor
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Detection of breaks originating in the middle of a character
Start/end break interrupt/status
DMA Timers (DTIM0-DTIM3)
General-Purpose Timers (GPTA/GPTB)
Periodic Interrupt Timers (PIT0-PIT3)
Software Watchdog Timer
Phase Locked Loop (PLL)
DMA Controller
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Overview
1-11