ATAB5423-3-WB Atmel, ATAB5423-3-WB Datasheet - Page 30

KIT DEMO 315MHZ BLACKBIRD

ATAB5423-3-WB

Manufacturer Part Number
ATAB5423-3-WB
Description
KIT DEMO 315MHZ BLACKBIRD
Manufacturer
Atmel
Type
Transceiver, UHFr
Datasheets

Specifications of ATAB5423-3-WB

Frequency
315MHz
Product
RF Modules
For Use With/related Products
ATA5423
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATAB-5423-3-WB
5. Power Supply
Figure 5-1.
30
PWR_ON
ATA5423/ATA5425/ATA5428/ATA5429
VSINT
(Control register 3)
VSOUT_EN
VAUX
(Command via SPI)
(Control register 1)
VS1
VS2
DVCC_OK
AVCC_EN
T1
T5
Power Supply
OFFCMD
to
0.55V
VS1+
typ.
IN
The supply voltage range of the ATA5423/ATA5425/ATA5428/ATA5429 is 2.4V to 3.6V or 4.4V
to 6.6V.
Pin VS1 is the supply voltage input for the range 2.4V to 3.6V and is used in 1 Li battery applica-
tions (3V) using a single lithium 3V cell. Pin VS2 is the voltage input for the range 4.4V to 6.6V
(2 Li battery application (6V) and Base-station Application (5V); in this case, the voltage regula-
tor V_REG1 regulates VS1 to typically 3.25V. If the voltage regulator is active, a blocking
capacitor of 2.2 µF has to be connected to VS1.
Pin VAUX is an input for an additional auxiliary voltage supply and can be connected, for exam-
ple, to an inductive supply (see
with a rectifier or as in the application shown in
open.
Pin VSINT is the voltage input for the Microcontoller_Interface and must be connected to the
power supply of the microcontroller. The voltage range of V
on page 35
+
-
3.25V typ.
V_REG2
1
1
(Status register)
EN
S
0
0
1
1
P_On_Aux
R
0
1
0
1
IN
S
R
FF1
Q
no change
0
1
1
OUT
and
Q
3.25V typ.
V_REG1
Figure 5-6 on page
EN
and
OUT
SW_VSOUT
Figure 5-6 on page
36).
SW_DVCC
SW_AVCC
Figure 2.2 on page 8
36). This input can only be used together
VSINT
2.38V typ.)
V_Monitor
(1.5V typ.)
V_Monitor
(2.3V/
is 2.4V to 5.25V (see
and must otherwise be left
DVCC_OK
(to XTO and
Reset Logic)
VSOUT_OK
(to XTO and
Reset Logic)
Low_Batt
(Status Register
and Reset Logic)
AVCC
DVCC
VSOUT
4841D–WIRE–10/07
Figure 5-5

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