T48C862M-R3-TNS Atmel, T48C862M-R3-TNS Datasheet - Page 71

• Manufacturer Part Number: T48C862M-R3-TNS
• Description: IC MON TIRE PRESS 315MHZ 24SOIC
• Manufacturer: Atmel

Specifications of T48C862M-R3-TNS

• Frequency: 315MHz
• Modulation Or Protocol: FM, FSK
• Data Rate - Maximum: 32 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 9.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1KB EEPROM, 1KB RAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Applications: -

4554A–4BMCU–02/03
Before activating the SSI (SIR = 0) and commencing an MCL dialog, the appropriate
data direction for the first word must be set using the SDD control bit. The state of this
bit controls the direction of the data port (BP43 or MCL_SD). Once started, the 8 data
bits are, depending on the selected direction, either clocked into or out of the shift regis-
ter. During the 9th clock period, the port direction is automatically switched over so that
the corresponding acknowledge bit can be shifted out or read in. In transmit mode, the
acknowledge bit received from the device is captured in the SSI Status Register (TACK)
where it can be read by the controller. In receive mode, the state of the acknowledge bit
to be returned to the device is predetermined by the SSI Status Register (RACK).
Changing the directional mode (TX/RX) should not be performed during the transfer of
an MCL telegram. One should wait until the end of the telegram which can be detected
using the SSI interrupt (IFN =1) or by interrogating the ACT status.
Once started, a 9-bit telegram will always run to completion and will not be prematurely
terminated by the SIR bit. So, if the SIR-bit is set to ‘1’ in telegram, the SSI will complete
the current transfer and terminate the dialog with an MCL stop condition.
Figure 68. Example of MCL Transmit Dialog
(IFN = 0)
(IFN = 1)
Interrupt
Interrupt
SRDY
ACT
SDD
SIR
SD
SC
Write STB
(tx data 1)
Start
msb
7 6 5 4 3 2 1
tx data 1
lsb
0 A
Write STB
(tx data 2)
msb
7 6 5 4 3 2 1 0 A
tx data 2
lsb
T48C862-R3
Stop
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