MFRC50001T/0FE,112 NXP Semiconductors, MFRC50001T/0FE,112 Datasheet - Page 40

• Manufacturer Part Number: MFRC50001T/0FE,112
• Description: IC MIFARE READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC50001T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2222-5; 935268039112; MFRC500; MFRC51T0FED

NXP Semiconductors
Table 31.
MFRC500_33
Product data sheet
PUBLIC
Sub
address
(Hex)
Page 4: RF Timing and channel redundancy
20h
21h
22h
23h
24h
25h
26h
27h
Page 5: FIFO, timer and IRQ pin configuration
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
Page 6: reserved registers
30h
31h
32h
33h
34h
35h
36h
37h
Page 7: Test control
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
3Fh
Register name
Page
RxWait
ChannelRedundancy
CRCPresetLSB
CRCPresetMSB
PreSet25
MFOUTSelect
PreSet27
Page
FIFOLevel
TimerClock
TimerControl
TimerReload
IRQPinConfig
PreSet2E
PreSet2F
Page
reserved
reserved
reserved
reserved
reserved
reserved
reserved
Page
reserved
TestAnaSelect
reserved
reserved
TestDigiSelect
reserved
reserved
MFRC500 register overview
Function
selects the page register
selects the interval after transmission before the receiver starts
selects the method and mode used to check data integrity on
the RF channel
preset LSB value for the CRC register
preset MSB value for the CRC register
do not change these values
selects internal signal applied to pin MFOUT, includes the MSB
of value TimeSlotPeriod; see
do not change these values
selects the page register
defines the FIFO buffer overflow and underflow warning levels
selects the timer clock divider
selects the timer start and stop conditions
defines the timer preset value
configures pin IRQ output stage
do not change these values
do not change these values
selects the page register
reserved
reserved
reserved
reserved
reserved
reserved
reserved
selects the page register
reserved
selects analog test mode
reserved
reserved
selects digital test mode
reserved
reserved
…continued
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 15 March 2010
048033
Table 101 on page 60
Highly Integrated ISO/IEC 14443 A Reader IC
Refer to
Table 33 on page 43
Table 91 on page 58
Table 93 on page 58
Table 95 on page 59
Table 97 on page 59
Table 99 on page 59
Table 101 on page 60
Table 103 on page 60
Table 33 on page 43
Table 41 on page 46
Table 107 on page 61
Table 109 on page 62
Table 111 on page 62
Table 113 on page 63
Table 115 on page 63
Table 116 on page 63
Table 33 on page 43
Table 117 on page 63
Table 33 on page 43
Table 118 on page 64
Table 119 on page 64
Table 121 on page 65
Table 122 on page 65
Table 123 on page 65
Table 125 on page 66
MFRC500
© NXP B.V. 2010. All rights reserved.
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