CLRC63201T/0FE,112 NXP Semiconductors, CLRC63201T/0FE,112 Datasheet - Page 122

• Manufacturer Part Number: CLRC63201T/0FE,112
• Description: IC I.CODE HS READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: I-Coder

Specifications of CLRC63201T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693, ISO18000-3
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2199-5; 935269690112; CLRC632; CLRC63201TD

NXP Semiconductors
Table 71. TxControl register (address: 11h)
Table 72. TxControl register bit descriptions . . . . . . . . . .59
Table 73. CwConductance register (address: 12h)
Table 74. CwConductance register bit descriptions . . . .60
Table 75. ModConductance register (address: 13h)
Table 76. ModConductance register bit descriptions . . . .60
Table 77. CoderControl register (address: 14h)
Table 78. CoderControl register bit descriptions . . . . . . .61
Table 79. ModWidth register (address: 15h)
Table 80. ModWidth register bit descriptions . . . . . . . . . .62
Table 81. ModWidthSOF register (address: 16h)
Table 82. ModWidthSOF register bit descriptions . . . . . .62
Table 83. TypeBFraming register (address: 17h)
Table 84. TypeBFraming register bit descriptions . . . . . .63
Table 85. RxControl1 register (address: 19h)
Table 86. RxControl1 register bit descriptions . . . . . . . . .64
Table 87. DecoderControl register (address: 1Ah)
Table 88. DecoderControl register bit descriptions . . . . .65
Table 89. BitPhase register (address: 1Bh)
Table 90. BitPhase register bit descriptions . . . . . . . . . .65
Table 91. RxThreshold register (address: 1Ch)
Table 92. RxThreshold register bit descriptions . . . . . . .66
Table 93. BPSKDemControl register (address: 1Dh)
Table 94. BPSKDemControl register bit descriptions . . .66
Table 95. RxControl2 register (address: 1Eh)
Table 96. RxControl2 register bit descriptions . . . . . . . . .67
Table 97. ClockQControl register (address: 1Fh)
Table 98. ClockQControl register bit descriptions . . . . . .67
Table 99. RxWait register (address: 21h)
Table 100.RxWait register bit descriptions . . . . . . . . . . . .68
Table 101.ChannelRedundancy register (address: 22h)
Table 102.ChannelRedundancy bit descriptions . . . . . . .68
Table 103.CRCPresetLSB register (address: 23h)
Table 104.CRCPresetLSB register bit descriptions . . . . .69
CLRC632_35
Product data sheet
PUBLIC
reset value: 0101 1000b, 58h bit allocation . . .59
reset value: 0011 1111b, 3Fh bit allocation . . .60
reset value: 0011 1111b, 3Fh bit allocation . . .60
reset value: 0001 1001b, 19h bit allocation . . .61
reset value: 0001 0011b, 13h bit allocation . . .62
reset value: 0011 1111b, 3Fh bit allocation . . .62
reset value: 0011 1011b, 3Bh bit allocation . . .63
reset value: 0111 0011b, 73h bit allocation . . .64
reset value: 0000 1000b, 08h bit allocation . . .65
reset value: 1010 1101b, ADh bit allocation . .65
reset value: 1111 1111b, FFh bit allocation . . .66
reset value: 0001 1110b, 1Eh bit allocation . . .66
reset value: 0100 0001b, 41h bit allocation . . .67
reset value: 000x xxxxb, xxh bit allocation . . . .67
reset value: 0000 0101b, 06h bit allocation . . .68
reset value: 0000 0011b, 03h bit allocation . . .68
reset value: 0101 0011b, 63h bit allocation . . .69
Rev. 3.5 — 10 November 2009
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
073935
Table 105.CRCPresetMSB register (address: 24h)
Table 106.CRCPresetMSB bit descriptions . . . . . . . . . . . 69
Table 107.TimeSlotPeriod register (address: 25h)
Table 108.TimeSlotPeriod register bit descriptions . . . . . 70
Table 109.MFOUTSelect register (address: 26h)
Table 110.MFOUTSelect register bit descriptions . . . . . . 70
Table 111.PreSet27 (address: 27h)
Table 112.FIFOLevel register (address: 29h)
Table 113.FIFOLevel register bit descriptions . . . . . . . . . 71
Table 114.TimerClock register (address: 2Ah)
Table 115.TimerClock register bit descriptions . . . . . . . . 71
Table 116.TimerControl register (address: 2Bh)
Table 117.TimerControl register bit descriptions . . . . . . . 72
Table 118.TimerReload register (address: 2Ch)
Table 119.TimerReload register bit descriptions . . . . . . . 72
Table 120.IRQPinConfig register (address: 2Dh)
Table 121.IRQPinConfig register bit descriptions . . . . . . 73
Table 122.PreSet2E register (address: 2Eh)
Table 123.PreSet2F register (address: 2Fh)
Table 124.Reserved registers (address: 31h, 32h,
Table 125.Reserved register (address: 39h)
Table 126.TestAnaSelect register (address: 3Ah)
Table 127.TestAnaSelect bit descriptions . . . . . . . . . . . . 74
Table 128.Reserved register (address: 3Bh)
Table 129.Reserved register (address: 3Ch)
Table 130.TestDigiSelect register (address: 3Dh)
Table 131.TestDigiSelect register bit descriptions . . . . . . 75
Table 132.Reserved register (address: 3Eh, 3Fh)
Table 133.CLRC632 commands overview . . . . . . . . . . . . 76
Table 134.StartUp command 3Fh . . . . . . . . . . . . . . . . . . 78
Table 135.Idle command 00h . . . . . . . . . . . . . . . . . . . . . . 78
Table 136.Transmit command 1Ah . . . . . . . . . . . . . . . . . 79
reset value: 0101 0011b, 63h bit allocation . . . 69
reset value: 0000 0000b, 00h bit allocation . . . 69
reset value: 0000 0000b, 00h bit allocation . . . 70
reset value: xxxx xxxxb, xxh bit allocation . . . . 70
reset value: 0000 1000b, 08h bit allocation . . . 71
reset value: 0000 0111b, 07h bit allocation . . . 71
reset value: 0000 0110b, 06h bit allocation . . . 72
reset value: 0000 1010b, 0Ah bit allocation . . 72
reset value: 0000 0010b, 02h bit allocation . . . 73
reset value: xxxx xxxxb, xxh bit allocation . . . . 73
reset value: xxxx xxxxb, xxh bit allocation . . . . 73
33h, 34h, 35h, 36h, 37h) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 73
reset value: xxxx xxxxb, xxh bit allocation . . . . 74
reset value: 0000 0000b, 00h bit allocation . . . 74
reset value: xxxx xxxxb, xxh bit allocation . . . . 75
reset value: xxxx xxxxb, xxh bit allocation . . . . 75
reset value: xxxx xxxxb, xxh bit allocation . . . . 75
reset value: xxxx xxxxb, xxh bit allocation . . . . 76
CLRC632
© NXP B.V. 2009. All rights reserved.
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