MFRC52201HN1,151 NXP Semiconductors, MFRC52201HN1,151 Datasheet - Page 17

• Manufacturer Part Number: MFRC52201HN1,151
• Description: IC READER 13.56MHZ 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of MFRC52201HN1,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280547151

NXP Semiconductors
112132
Product data sheet
9.2.1.6 DivIRqReg
Table 16:
All bits in the register CommIRqReg shall be cleared by software.
Contains Interrupt Request bits
Table 17:
Table 18:
All bits in the register DivIRqReg shall be cleared by software.
Bit
2
1
0
Bit
7
6 to 5
4
3
2
1 to 0
Symbol
Access
Rights
Bit
Symbol
LoAlertIRq Set to logic 1, when bit LoAlert in register Status1Reg is set. In opposition to
ErrIRq
TimerIRq
Symbol
Set2
-
MfinActIRq
-
CRCIRq
-
Description of CommIRqReg bits
DivIRqReg register (address 05h); reset value: X0h
Description of DivIRqReg bits
Set2
w
7
Description
LoAlert, LoAlertIRq stores this event and can only be reset as indicated by bit
Set1.
Set to logic 1 if any error bit in the ErrorReg Register is set.
Set to logic 1 when the timer decrements the TimerValue Register to zero.
6
Rev. 3.2 — 22 May 2007
RFU
Description
Set to logic 1, Set2 defines that the marked bits in the register
DivIRqReg are set.
Set to logic 0, Set2 defines, that the marked bits in the register
DivIRqReg are cleared
Reserved for future use.
Set to logic 1, when MFIN is active. This interrupt is set when either a
rising or falling signal edge is detected.
Reserved for future use.
Set to logic 1, when the CRC command is active and all data are
processed.
Reserved for future use.
-
5
MfinActIRq
dy
4
…continued
RFU
3
-
CRCIRq
dy
2
Contactless Reader IC
MFRC522
© NXP B.V. 2007. All rights reserved.
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