MFRC52201HN1,151 NXP Semiconductors, MFRC52201HN1,151 Datasheet - Page 54

• Manufacturer Part Number: MFRC52201HN1,151
• Description: IC READER 13.56MHZ 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of MFRC52201HN1,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280547151

NXP Semiconductors
112132
Product data sheet
10.4.4 Byte format
10.4.5 Acknowledge
Each byte has to be followed by an acknowledge bit. Data is transferred with the MSB
first, see
transmitted bytes during one data transfer is unrestricted but shall fulfil the read/ write
cycle format.
An acknowledge at the end of one data byte is mandatory. The acknowledge-related clock
pulse is generated by the master. The transmitter of data, either master or slave, releases
the SDA line (HIGH) during the acknowledge clock pulse. The receiver shall pull down the
SDA line during the acknowledge clock pulse so that it remains stable LOW during the
HIGH period of this clock pulse.
The master can then generate either a STOP (P) condition to stop the transfer, or a
repeated START (Sr) condition to start a new transfer.
A master-receiver shall indicate the end of data to the slave- transmitter by not generating
an acknowledge on the last byte that was clocked out by the slave. The slave-transmitter
shall release the data line to allow the master to generate a STOP (P) or repeated START
(Sr) condition.
Fig 14. Acknowledge on the I
Figure 16 “First byte following the START
Rev. 3.2 — 22 May 2007
2
C- bus.
procedure.”. The number of
Contactless Reader IC
MFRC522
© NXP B.V. 2007. All rights reserved.
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