MCP4441T-503E/ST Microchip Technology, MCP4441T-503E/ST Datasheet - Page 44

• Manufacturer Part Number: MCP4441T-503E/ST
• Description: IC DGTL POT 129TAPS QUAD 20TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP4441T-503E/ST

• Package / Case: 20-TSSOP (0.173", 4.40mm Width)
• Temperature Coefficient: 150 ppm/°C Typical
• Taps: 129
• Resistance (ohms): 50K
• Number Of Circuits: 4
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Pots: Quad
• Taps Per Pot: 129
• Resistance: 50 KOhms
• Wiper Memory: Non Volatile
• Buffered Wiper: Buffered
• Digital Interface: I2C
• Operating Supply Voltage: 2.7 V to 5.5 V
• Supply Current: 600 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Description/function: Quad I2C Digital POT with Nonvolatile Memory
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP444X/446X
4.2.2.1
This register contains 7 status bits. These bits show the
state of the WiperLock bits, the Write Protect bit, and if
an EEPROM write cycle is active. The STATUS register
can be accessed via the READ commands.
1
The STATUS register is placed at Address 05h.
REGISTER 4-1:
DS22265A-page 44
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 8-7
bit 6
bit 5
bit 4
Note 1:
describes each STATUS register bit.
R-1
D8:D7
Requires a High Voltage command to modify the state of this bit (for Nonvolatile devices only). This bit is
not directly written, but reflects the system state (for this feature).
Status (STATUS) Register
D8:D7: Reserved. Forced to “1”
WL3: WiperLock Status bit for Resistor Network 3 (Refer to
further information)
The WiperLock Technology bit (WL3) prevents the Volatile and Nonvolatile Wiper 3 addresses and the
TCON1 register bits R3HW, R3A, R3W, and R3B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1 = Wiper and TCON1 register bits R3HW, R3A, R3W, and R3B of Resistor Network 3 (Pot 3) are
0 = Wiper and TCON1 of Resistor Network 3 (Pot 3) can be modified
WL2: WiperLock Status bit for Resistor Network 2 (Refer to
further information)
The WiperLock Technology bit (WL2) prevents the Volatile and Nonvolatile Wiper 2 addresses and the
TCON1 register bits R2HW, R2A, R2W, and R2B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1 = Wiper and TCON1 register bits R2HW, R2A, R2W, and R2B of Resistor Network 2 (Pot 2) are
0 = Wiper and TCON1 of Resistor Network 2 (Pot 2) can be modified
EEWA: EEPROM Write Active Status bit
This bit indicates if the EEPROM Write Cycle is occurring.
1 = An EEPROM Write cycle is currently occurring. Only serial commands to the Volatile memory
0 = An EEPROM Write cycle is NOT currently occurring
Note:
Note:
R-1
“Locked” (Write Protected)
“Locked” (Write Protected)
locations are allowed (addresses 00h, 01h, 04h, and 05h)
STATUS REGISTER
The WL3 bit always reflects the result of the last programming cycle to the nonvolatile WL3
bit. After a POR/BOR or RESET pin event, the WL3 bit is loaded with the nonvolatile WL3 bit
value.
The WL0 bit always reflects the result of the last programming cycle to the nonvolatile WL0
bit. After a POR/BOR or RESET pin event, the WL0 bit is loaded with the nonvolatile WL0 bit
value.
W = Writable bit
‘1’ = Bit is set
WL3
R-1
(1)
WL2
Register 4-
R-1
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEWA
R-0
WL1
R-x
(1)
Section 5.3 “WiperLock Technology”
Section 5.3 “WiperLock Technology”
x = Bit is unknown
WL0
R-x
© 2010 Microchip Technology Inc.
(1)
R-1
—
WP
R-x
(1)
bit 0
for
for