ELLXT971ABC.A4-870477 Cortina Systems Inc, ELLXT971ABC.A4-870477 Datasheet - Page 31

• Manufacturer Part Number: ELLXT971ABC.A4-870477
• Description: TXRX FAST ETH COMM TEMP 64-PBGA
• Manufacturer: Cortina Systems Inc

Specifications of ELLXT971ABC.A4-870477

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1008-1003

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Figure 7
5.4.1
Cortina Systems
Initialization Sequence
MDIO Control Mode and Hardware Control Mode
In the MDIO Control mode, the LXT971A PHY reads the Hardware Control Interface pins
to set the initial (default) values of the MDIO registers. Once the initial values are set, bit
control reverts to the MDIO interface.
The following modes are available using either Hardware Control or MDIO control:
®
• Force network link to 100BASE-FX (Fiber)
• Force network link operation to:
LXT971A Single-Port 10/100 Mbps PHY Transceiver
— 100BASE-TX, Full-Duplex
— 100BASE-TX, Half-Duplex
— 10BASE-T, Full-Duplex
MDIO Controlled Operation
Reset MDIO Registers to
(MDIO Writes Enabled)
Control Interface at last
MDIO Control
values read at H/W
Hardware Reset
Mode
Software
Reset?
Yes
Low
Initialize MDIO Registers
Power-up or Reset
Read H/W Control
No
MDDIS Voltage
Interface
Level?
Disable MDIO Read and
High
Hardware Control
Write Operations
Mode
B3473-01
5.4 Initialization
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