ELLXT971ABC.A4-870477 Cortina Systems Inc, ELLXT971ABC.A4-870477 Datasheet - Page 50

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ELLXT971ABC.A4-870477

Manufacturer Part Number
ELLXT971ABC.A4-870477
Description
TXRX FAST ETH COMM TEMP 64-PBGA
Manufacturer
Cortina Systems Inc

Specifications of ELLXT971ABC.A4-870477

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1008-1003

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LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
5.8.4
5.8.5
5.8.6
5.8.7
5.8.8
5.9
5.9.1
Cortina Systems
10BASE-T Link Integrity Test
In 10BASE-T mode, the LXT971A PHY always transmits link pulses.
Link Failure
Link failure occurs if the Link Integrity Test is enabled and link pulses or packets stop
being received. If this condition occurs, the LXT971A PHY returns to the auto-negotiation
phase if auto-negotiation is enabled. If the Link Integrity Test function is disabled by
setting Configuration register bit 16.14 to ‘1’, the LXT971A PHY transmits packets,
regardless of link status.
10BASE-T SQE (Heartbeat)
By default, the Signal Quality Error (SQE) or heartbeat function is disabled on the
LXT971A PHY. To enable this function, set register bit 16.9 = 1. When this function is
enabled, the LXT971A PHY asserts its COL output for 5 to 15 bit times (BT) after each
packet. For SQE timing parameters, see
on page
10BASE-T Jabber
If a transmission exceeds the jabber timer, the LXT971A PHY disables the transmit and
loopback functions. For jabber timing parameters, see
Unjabber Timing, on page
The LXT971A PHY automatically exits jabber mode after the unjabber time has expired.
This function can be disabled by setting register bit 16.10 = 1.
10BASE-T Polarity Correction
The LXT971A PHY automatically detects and corrects for the condition in which the
receive signal (TPFIP/N) is inverted. Reversed polarity is detected if eight inverted link
pulses, or four inverted end-of-frame (EOF) markers, are received consecutively. If link
pulses or data are not received by the maximum receive time-out period (96 to 128 ms),
the polarity state is reset to a non-inverted state.
Monitoring Operations
Monitoring Auto-Negotiation
Auto-negotiation can be monitored as follows:
®
• If the Link Integrity Test function is enabled (the normal configuration), the LXT971A
• If the Link Integrity Test function is disabled (which can be done by setting
• register bit 17.7 is set to ‘1’ once the auto-negotiation process is completed.
• register bits 1.2 and 17.10 are set to ‘1’ once the link is established.
LXT971A Single-Port 10/100 Mbps PHY Transceiver
PHY monitors the connection for link pulses. Once link pulses are detected, data
transmission is enabled and remains enabled as long as either the link pulses or data
transmission continue. If the link pulses stop, the data transmission is disabled.
Configuration register bit 16.14 to ‘1’), the LXT971A PHY transmits to the connection
regardless of detected link pulses.
73.
73.
Figure 36, 10BASE-T SQE (Heartbeat) Timing,
Figure 35, 10BASE-T Jabber and
5.9 Monitoring Operations
Page 50

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