ISL6334AIRZR5368 Intersil, ISL6334AIRZR5368 Datasheet - Page 27

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ISL6334AIRZR5368

Manufacturer Part Number
ISL6334AIRZR5368
Description
IC CTRLR PWM 4PHASE BUCK 40QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6334AIRZR5368

Applications
Controller, Intel VR11.1
Voltage - Input
3 V ~ 12 V
Number Of Outputs
1
Voltage - Output
0.5 V ~ 1.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
outlined in “Load-Line Regulation Resistor” on page 26.
Select a target bandwidth for the compensated system, f
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
each of the three cases which follow, there is a separate set
of equations for the compensation components.
FIGURE 17. COMPENSATION CONFIGURATION FOR
R
FB
LOAD-LINE REGULATED ISL6334AR5368
CIRCUIT
V
+
-
DROOP
R
C
C
FB
2
C
(OPTIONAL)
, has already been chosen as
C
27
C
and C
COMP
VDIFF
FB
C
.
ISL6334AR5368
0
.
0
In Equation 35, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V
amplitude described in the “Electrical Specifications” table
beginning on page 8.
The optional capacitor C
noise away from the PWM comparator. Keep a position
available for C
capacitor of between 10pF and 100pF in case any
leading-edge jitter problem is noted.
Once selected, the compensation values in Equation 35
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R
value of R
oscilloscope until no further improvement is noted. Normally,
C
Equation 35 unless some performance issue is noted.
Output Filter Design
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter necessarily limits the
system transient response. The output capacitor must
supply or sink load current while the current in the output
inductors increases or decreases to meet the demand.
Case 3:
Case 2:
Case 1:
C
will not need adjustment. Keep the value of C
C
while observing the transient performance on an
2
, and be prepared to install a high-frequency
f
R
C
-------------------
2π LC
R
C
R
C
-------------------
2π LC
0
C
C
C
C
C
C
>
1
1
----------------------------- -
2πC ESR
=
=
=
=
=
=
R
0.75V
------------------------------------------------ -
R
--------------------------------------------------------------
(
R
----------------------------------- -
2πV
2πV
2
FB
>
FB
FB
(
, is sometimes needed to bypass
1
0.75V
f
f
)
0
0
V
--------------------------------------------- -
2
PP
2πf
------------------------------------- -
----------------------------------------- -
0.75 V
P-P
<
IN
P-P
f
0
2π f
----------------------------- -
2πC ESR
R
0.75V
2
0.75V
)
(
0
R
0.75 V
IN
ESR
FB
V
(
V
FB
0
P-P
P-P
IN
(
f
V
1
0
f
)
P-P
0
IN
IN
(
2
R
) C
ESR
IN
C
f
FB
LC
0
L
L
2
. Slowly increase the
PP
)
LC
)
LC
is the sawtooth
September 7, 2010
C
from
(EQ. 35)
FN6839.2

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