ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet
ZL6100EVAL1Z
Specifications of ZL6100EVAL1Z
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ZL6100EVAL1Z Summary of contents
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... SCL SDA SALRT CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners ZL6100 December 15, 2010 FN6876 DLY ...
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Table of Contents Absolute Maximum Ratings ............................................................................................................................................................ 3 Thermal Information......................................................................................................................................................................... 3 Recommended Operating Conditions............................................................................................................................................ 3 Electrical Specifications .................................................................................................................................................................. 3 Pinout ................................................................................................................................................................................................ 6 Pin Descriptions ............................................................................................................................................................................... 6 Typical Application Circuit .............................................................................................................................................................. 8 ZL6100 Overview .............................................................................................................................................................................. 8 Digital-DC Architecture .................................................................................................................................................................. 8 Power ...
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... ZL6100 Thermal Information Thermal Resistance (Typical, Notes 5, 6) θ QFN . . . . . . . . . . . . . . . . . . . . . . Operating Junction Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-55°C to +150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Supply Voltage Range (Typical) ) for Floating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 14V ...
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Electrical Specifications V = 12V apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER Soft-start Delay Duration Range (Note 11) Soft-start Delay Duration Accuracy Soft-start Ramp Duration Range Soft-start Ramp Duration Accuracy LOGIC INPUT/OUTPUT CHARACTERISTICS Logic ...
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Electrical Specifications V = 12V apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER UVLO Set-point Accuracy UVLO Hysteresis UVLO Delay Power-Good V Threshold OUT Power-Good V Hysteresis OUT Power-Good Delay VSEN Undervoltage Threshold VSEN Overvoltage ...
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Pinout DGND SALRT Pin Descriptions PIN TYPE NUMBER LABEL (Note 19) 1 DGND PWR Digital ground. Common return for digital signals. Connect to low impedance ground plane. 2 SYNC I/O,M Clock synchronization input. Used to set switching frequency of internal ...
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Pin Descriptions (Continued) PIN TYPE NUMBER LABEL (Note 19) 20 ISENA I Differential voltage input for current limit. High voltage tolerant PWR Internal 5V reference used to power internal drivers Low side FET gate drive. ...
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... A Windows™-based GUI is also provided to enable full configuration and monitoring capability via the 2 I C/SMBus interface using an available computer and the included USB cable. Please refer to www.intersil.com for access to the most up-to-date documentation or call your local Intersil sales office to order an evaluation kit. V 12V IN ...
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Power Conversion Overview > > MGN MGN EN EN VTRK VTRK SYNC SYNC GEN GEN SYNC SYNC REFCN REFCN SALRT SALRT SDA SDA Communication Communication SCL SCL SA(0,1) ...
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MOSFET. for more details, see “High-side Driver Boost Circuit” on page 11. In general, the size of components L1 and C the overall efficiency of the circuit are inversely proportional to the switching frequency Therefore, the highest ...
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The SMBus device address and VOUT_MAX are the only parameters that must be set by external pins. All other device 2 parameters can be set via the I C/SMBus. The device address is set using the SA0 and SA1 pins. ...
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TABLE 3. RESISTORS FOR SETTING OUTPUT VOLTAGE INDEX (kΩ) INDEX 12.1 3 13.3 4 14.7 5 16.2 6 17.8 7 19.6 8 21.5 9 23.7 10 26.1 11 28.7 12 31.6 Example ...
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TABLE 4. POLA MODE V SETTINGS (R0 = 110k, OUT 10k) SET R SET IN SERIES WITH 10kΩ V RESISTOR V OUT OUT (V) (kΩ) (V) 0.700 162 0.991 0.752 110 1.000 0.758 100 1.100 0.765 ...
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STEP STEP NAME 1 Power Applied 2 Internal Memory Check 3 Multi-mode Pin Check 4 Device Ready 5 Pre-ramp Delay Soft-start Delay and Ramp Times It may be necessary to set a delay from when an enable signal is received ...
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R NC DLY ZL6100 R SS FIGURE 12. DLY AND SS PIN RESISTOR CONNECTIONS Note: Do not connect a resistor to the DLY1 pin. This pin is not utilized for setting soft-start delay times. Connecting an external resistor to this ...
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SYNC TABLE 11. SWITCHING FREQUENCY SELECTION SYNC PIN LOW OPEN HIGH Resistor TABLE 12. R RESISTOR VALUES SYNC SYNC SW SYNC (kΩ) (kHz) (kΩ) 10 200 11 222 26.1 12.1 242 28.7 13.3 267 ...
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TABLE 13. POWER SUPPLY REQUIREMENTS PARAMETER RANGE Input voltage (V ) 3.0V to 14.0V IN Output voltage (V ) 0.6V to 5.0V OUT Output current ( ~25A OUT Output voltage ripple < ...
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As a starting point, apportion one-half of the output ripple voltage to the capacitor ESR and the other half to capacitance, as shown in Equations 10 and 11: I opp = C OUT V orip × × ...
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Next, calculate the switching time using Equation 22 gdr where Q is the gate charge of the selected QH and I g the peak gate drive current available from the ZL6100. Although the ZL6100 ...
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Where the desired maximum current that should flow in the LIM circuit R is the resistance of the sensing element SENSE V is the voltage across the sensing element at the point LIM the circuit should start limiting ...
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TABLE 16. RESISTOR CONFIGURED CURRENT SENSING METHOD SELECTION R CURRENT SENSING ILIMI1 (kΩ) METHOD 10 11 12.1 Ground-referenced sensing DS(ON) 13.3 Best for low duty cycle and low f Blanking time: 672ns 14.7 16.2 17.8 19.6 21.5 23.7 ...
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Loop Compensation The ZL6100 operates as a voltage-mode synchronous buck controller with a fixed frequency PWM scheme. Although the ZL6100 uses a digital control loop, it operates much like a traditional analog PWM controller. Figure simplified block ...
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Non-linear Response (NLR) Settings The ZL6100 incorporates a non-linear response (NLR) loop that decreases the response time and the output voltage deviation in the event of a sudden output load current step. The NLR loop incorporates a secondary error signal ...
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SW MIN + ⎜ ⎟ (D) = MIN SW ⎝ D ⎠ NOM Otherwise PROG Refer to Figure 17. Due to ...
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The ZL6100 provides pre-bias protection by sampling the output voltage prior to initiating an output ramp pre-bias voltage lower than the target voltage exists after the pre-configured delay period has expired, the target voltage is set to ...
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Continue operating through the fault (this could result in permanent damage to the power supply). 5. Initiate an immediate shutdown. If the user has configured the device to restart, the device will wait the preset delay period (if configured ...
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V is the nominal output voltage set NOM point determined by the V0 and V1 pins. A safety feature prevents the user from configuring the output voltage to exceed V + 10% under any conditions. ...
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To determine the SA0 and SA1 resistor values given an SMBus address (in decimal), follow the indicated steps to calculate an index value and then use Table to select the resistor that corresponds to the calculated index value as shown ...
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Frequency and PLL” on page 15” for more details on the operating parameters of the SYNC pin. Multiple device sequencing may also be achieved by issuing PMBus commands to assign the preceding device in the sequencing chain as ...
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TABLE 25. CFG PIN CONFIGURATIONS FOR SEQUENCING R CFG (k Ω 12.1 14.7 16.2 17.8 21.5 23.7 26.1 31.6 34.8 38.3 Droop resistance is used to add artificial resistance in the output voltage path to control the slope ...
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The ZL6100 offers the ability to add and drop phases using a simple command in response to an observed load current change, enabling the system to continuously optimize overall efficiency across a wide load range. All phases in a current ...
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... In this case, the module manufacturer would use Related Documentation ITEM ZL6100EVAL1Z AN2033 AN2034 AN2035 32 ZL6100 the Default Store and would allow the user to restore the device to its default setting but would restrict the user from restoring the device to the factory settings ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L36.6x6A 36 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 9/09 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 5. 60 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 34 ZL6100 4X ...